Multilayer PCB Layout for Dense LED Arrays and Heat Dissipation

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Solution Overview

Problem

Existing LED arrays face challenges in miniaturization and efficient heat dissipation due to complex routing and high power density, which affect their addressability and thermal management.

Innovation Solution

A multi-layer circuit board design with triangular metal sections on each layer, where innermost sections are thermally and electrically coupled through vias to lower layers, allowing for efficient heat dissipation and simplified electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If LED arrays are closely packed to minimize size, then miniaturization is achieved, but heat dissipation becomes more difficult

Engineering Contradiction:
Improveoverall size of light-sourceVSAvoidheat dissipation efficiency
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

The patent transitions from planar heat dissipation to three-dimensional heat dissipation by routing thermal vias through multiple layers of the PCB. Innermost metal sections connect to bottom layer vias that extend through all top layers, creating vertical thermal pathways that efficiently conduct heat away from densely packed LED arrays without increasing planar footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The PCB is divided into multiple layers with dedicated metal sections for each LED emitter. Each metal section is electrically insulated from others and connected through vias to corresponding sections in lower layers, creating segmented thermal and electrical pathways that distribute heat across multiple routes rather than relying on a single planar heat sink.

Inventive Principle:
Principle #1Segmentation

2Reliability

If complex routing is used to connect LED arrays, then electrical connectivity is achieved, but routing complexity increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidrouting complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of routing signals across complex planar paths between adjacent LEDs, the patent uses vertical vias through multiple PCB layers to connect innermost metal sections. This three-dimensional connection approach simplifies routing by eliminating the need for intricate trace patterns while maintaining reliable electrical connectivity between all LED emitters.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Power

If high power density is used in LED arrays, then illumination intensity is improved, but thermal management becomes more difficult

Engineering Contradiction:
Improvepower densityVSAvoidthermal management efficiency
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

Each LED emitter is assigned a dedicated metal section on each PCB layer, with thermal vias connecting these sections vertically through the board thickness. This segmentation creates multiple discrete thermal pathways that distribute the heat generated by high-power density LEDs across numerous routes, preventing thermal congestion and improving overall thermal management efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent addresses high power density thermal management by conducting heat vertically through multiple PCB layers via vias, transforming a two-dimensional heat dissipation problem into a three-dimensional solution. This vertical thermal pathways efficiently removes heat from high-power LEDs without requiring increased planar heat sink area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enables effective heat dissipation and simplified routing for high-power LED arrays, improving addressability and thermal management while maintaining electrical connectivity.

Implementation Method 1

The innermost metal sections in the array are electrically and thermally coupled to the bottom layer by vias formed through all of the top layer and any layers between the top layer and the bottom layer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

The innermost metal sections in the array are electrically and thermally coupled to the bottom layer by vias formed through all of the top layer and any layers between the top layer and the bottom layer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20260013041A1Multi-layer circuit board for closely packed light-emitting diode (LED) arrays and method of manufacture
Publication Date: 2026.01.08 LUMILEDS LLC
  • US20260013041A1 patent drawing
  • US20260013041A1 patent drawing
  • US20260013041A1 patent drawing

AI summary

Multi-layer circuit boards and methods of manufacture are described herein. A multi-layer circuit board includes a top layer and a bottom layer. The top layer includes an array of metal sections that are electrically insulated from one another. The metal sections at a periphery of the array extend to an outer periphery of the multi-layer circuit board. The innermost metal sections in the array are electrically and thermally coupled to the bottom layer by vias formed through all of the top layer and any layers between the top layer and the bottom layer.