Multilayer PCB Wiring Reduces DDR3 Signal Ringing
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Solution Overview
Problem
In DDR3 memory systems, the conventional fly-by wiring structure leads to increased signal decay and reflection, causing waveform turbulence and ringing issues due to longer branch wire lengths, which can result in unsatisfied input voltage conditions for memory devices.
Innovation Solution
A printed wiring board design with a multilayer structure that alternates inner layer wiring patterns between two inner layers, reducing branch wire lengths by branching at inner layers closer to the memory devices, thereby reducing the number of vias and minimizing signal turbulence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If branch wires are sequentially branched from main wire using conventional fly-by method, then memory devices can be connected to transmit signals, but branch wire length increases causing signal decay and reflection
Solution Approach 1:
The patent utilizes a multilayer PCB structure where branch wires are formed on different layers (first outer layer, second outer layer, first inner layer, second inner layer) rather than sequentially on a single layer. This dimensional transition allows branch wires to be positioned closer to memory devices while maintaining electrical connection, effectively reducing branch wire length and associated signal degradation without compromising connectivity.
Solution Approach 2:
The wiring structure is segmented across multiple layers with insulating layers disposed between conductive layers. Branch wires are distributed across different layers rather than forming a continuous sequential path, which divides the signal path into shorter segments and reduces cumulative signal decay and reflection effects.
2Reliability
If branch wire length is reduced to minimize signal decay, then signal quality improves, but wiring structure complexity increases
Solution Approach 1:
Multiple functional elements are merged into an integrated multilayer structure where conductive layers, insulating layers, and branch wire connections are combined into a unified PCB architecture. This merging reduces the overall complexity compared to implementing separate connection structures for each layer transition.
Solution Approach 2:
The multilayer wiring structure serves multiple functions simultaneously: it provides electrical connection between memory devices and control circuitry, reduces signal decay through shorter branch paths, and maintains structural integrity through integrated insulating layers. This multi-functionality reduces the need for additional separate components or structures.
3Ease of manufacture
If vias are positioned far from signal terminal to secure via formation region, then manufacturing is easier, but branch wire length increases
Solution Approach 1:
The patent positions vias at optimized locations on specific layers (first inner layer and second inner layer) rather than constrained to outer layer positions, enabling shorter branch wire paths while maintaining adequate via formation region. The multilayer structure provides additional spatial dimensions for via placement optimization.
Data Source
AI summary
A printed wiring board includes a first main wire having first inner layer wiring patterns which are wired on inner layers connected by first via conductors in series. In addition, a second main wire has second inner layer wiring patterns which are wired on the inner layers connected by second via conductors. The first inner layer wiring patterns and the second inner layer wiring patterns are wired so as to change the layer to the inner layer on the opposite side to each other. First and second branch wires are branched from the first and second via conductors, respectively.