Multilayer Substrate Cascade Pillar Wiring Area

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Solution Overview

Problem

Current multilayer circuit board manufacturing technologies face limitations in miniaturization and heat dissipation due to positioning and size constraints of through holes and copper pillars, leading to reduced signal transmission performance and increased Pad requirements, which occupy valuable wiring area.

Innovation Solution

A multilayer substrate design that omits the Pad by connecting first through hole pillars in cascade with a public line, allowing for increased wiring area and improved alignment accuracy through the use of seed layers and adhesion metal layers, and a manufacturing method that involves selective lamination and electroplating to achieve this configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the current drilling-filling method is used to create through holes, then the through holes can be formed to connect different layers, but the positioning accuracy is limited to within 10 microns and the minimum hole diameter is 50-60 microns, which requires expansion of conducted lines to form Pads to avoid bad line connection, thereby reducing the wiring area of transmission lines

Engineering Contradiction:
Improvepositioning accuracy of through holeVSAvoidwiring area of transmission line
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent divides the through-hole connection structure into multiple segments: copper pillars at different layers, conductive lines connecting them, and Pads for expansion. This segmentation allows each component to be optimized independently, enabling higher positioning accuracy for copper pillars while managing the wiring area through strategic placement of expanded Pads only where necessary for connection reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a simple through-hole approach to a multi-dimensional structure by adding copper pillars that extend vertically between layers and conductive lines that connect these pillars. This dimensional expansion allows for more flexible routing and positioning, improving alignment accuracy while managing wiring area through three-dimensional space utilization rather than being constrained to two-dimensional plane only.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the sizes of line and hole or copper pillar are reduced to increase wiring area, then the available wiring area of transmission line is increased, but the signal transmission performance and heat dissipation effect of products decline

Engineering Contradiction:
Improvewiring area of transmission lineVSAvoidsignal transmission performance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies different quality requirements to different parts of the connection structure: copper pillars are designed with specific diameter requirements (e.g., 10-50 microns) to ensure good signal transmission and heat dissipation where needed, while conductive lines connecting them can be optimized for area efficiency. This local differentiation allows maintaining high reliability in critical connection points while maximizing overall wiring area.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite material structures by combining copper (high conductivity for signal and heat) with dielectric materials (for insulation and mechanical support) in a multi-layer configuration. This composite approach enables the copper pillars and lines to maintain excellent electrical and thermal performance while the overall structure optimizes wiring area through efficient material utilization and spatial arrangement.

Inventive Principle:
Principle #40Composite materials

3Reliability

If Pads are added to avoid bad line connection between layers, then the connection reliability is improved, but the Pads occupy valuable wiring area of transmission lines

Engineering Contradiction:
Improveconnection reliability between layersVSAvoidwiring area of transmission line
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the functions of Pads and connection lines by integrating the Pad structure directly with the conductive lines that connect copper pillars between layers. This merging eliminates the need for separate, large-area Pads by combining the expansion function with the connection function, thereby maintaining connection reliability while minimizing the occupied wiring area through unified structural design.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances signal transmission density, heat dissipation, and space utilization, promoting miniaturization by eliminating the need for Pads and improving alignment accuracy, thereby increasing the size of through holes and pillars.

Implementation Method 1

a first seed layer is arranged between the first through hole pillars of adjacent layers, and/or a second seed layer is arranged between the first through hole pillar and the public line

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

a first adhesion metal layer is arranged between the first seed layer and the dielectric layer, and/or, a second adhesion metal layer is arranged between the second seed layer and the dielectric layer

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS20230199957A1Multilayer substrate and manufacturing method therefor
Publication Date: 2023.06.22 ZHUHAI ACCESS SEMICONDUCTOR CO LTD
  • US20230199957A1 patent drawing
  • US20230199957A1 patent drawing
  • US20230199957A1 patent drawing

AI summary

A multilayer substrate and a manufacturing method thereof are disclosed. The multilayer substrate includes two or more dielectric layers laminated in sequence; a public line disposed at a top or bottom dielectric layer of the two or more dielectric layers; and two or more first through hole pillars respectively each embedded in a respective one of the dielectric layers, and the first through hole pillars are connected in cascade and then connected with the public line.