Multilayer TFT Contacts for Low Leakage and Parasitic Capacitance

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Solution Overview

Problem

As integrated circuits scale downward in size, challenges arise with parasitic effects like leakage current, short channel effects, and undesired capacitance due to the formation of interconnects in transistor structures, particularly in thin film transistors (TFTs), which affect the performance of backend structures.

Innovation Solution

The formation of multilayer contact structures in TFTs, comprising multiple semiconductor layers with varying material compositions and doping profiles, is employed to improve conductivity and reduce parasitic effects, including a first layer directly on the semiconductor region and subsequent layers with graded concentrations, followed by a conductive fill to enhance carrier mobility and reduce resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If highly conductive contacts are placed in close proximity to reduce interconnect area, then area is reduced, but leakage current and parasitic capacitance increase

Engineering Contradiction:
Improveinterconnect areaVSAvoidleakage current and parasitic capacitance
Core Design Contradiction:
Area of moving objectVSObject-generated harmful factors

Solution Approach 1:

The contact structure uses different materials with different properties at different locations: a first contact material at the interface with the semiconductor region for low contact resistance, and a second contact material extending upward for low parasitic capacitance. This local differentiation allows each region to optimize for its specific function, reducing overall harmful parasitic effects while maintaining compact area.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The contact employs a composite structure combining two different conductive materials. The first contact material (e.g., doped semiconductor or metal) provides optimal interface contact, while the second contact material (e.g., different metal or alloy) provides low capacitance to surrounding structures. This composite approach resolves the contradiction by achieving both low area and reduced parasitic effects through material diversity.

Inventive Principle:
Principle #40Composite materials

2Area of moving object

If contact dimensions are reduced to scale with smaller transistors, then transistor area decreases, but contact resistance increases

Engineering Contradiction:
Improvetransistor areaVSAvoidcontact resistance
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The contact structure applies local quality by using a first contact material specifically at the interface region with the semiconductor, where low contact resistance is critical. This material is optimized for interface properties rather than overall conductivity. The second material extends upward where interface effects are less dominant. This localized optimization maintains low contact resistance even as overall contact dimensions scale down.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The contact is segmented into two distinct material regions: a first segment at the interface and a second segment extending upward. This segmentation allows each part to be optimized independently for its specific function, enabling the contact to maintain low resistance despite reduced overall dimensions required for scaled transistors.

Inventive Principle:
Principle #1Segmentation

3Productivity

If effective gate length is reduced to improve transistor density, then transistor density increases, but short channel effects worsen

Engineering Contradiction:
Improvetransistor densityVSAvoidshort channel effects
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The contact structure uses local quality to create a graded transition region where the contact material properties change from the interface outward. This gradual transition reduces abrupt field variations that exacerbate short channel effects, allowing smaller gate lengths to be used while mitigating the harmful effects through localized material property optimization.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12610582B2Multi-layered source and drain contacts for a thin film transistor (TFT) structure
Publication Date: 2026.04.21 INTEL CORP
  • US12610582B2 patent drawing
  • US12610582B2 patent drawing
  • US12610582B2 patent drawing

AI summary

Techniques for forming thin film transistors (TFTs) having multilayer contact structures. An example integrated circuit includes a gate electrode, a gate dielectric on the gate electrode, a semiconductor region on the gate dielectric, and a conductive contact that contacts at least a portion of the semiconductor region. In some other cases, the conductive contact comprises a multilayer structure having at least a first material layer on the at least a portion of the semiconductor region, at least a second material layer on the first material layer, and a conductive fill material over the first and second material layers. In some other cases, the conductive contact comprises a multilayer structure having (1) a graded material layer on the at least a portion of the semiconductor region and (2) a conductive fill material over the graded material layer, wherein the graded material layer comprises a concentration gradient of a given element.