Multilevel Memory Cell Using Ferroelectric Polarization States
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Solution Overview
Problem
Conventional non-volatile memories are limited in capacity because each memory cell can only store a single bit of information, restricting memory capacity to the number of memory elements.
Innovation Solution
The use of multilevel state-programmable memory elements, such as ferroelectric capacitors, which can be remanently-polarized to more than two states, allowing each memory element to store multiple bits of information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional memory cells with single-bit memory elements are used, then the memory structure is simple and easy to manufacture, but the memory capacity is limited and directly proportional to the number of memory elements
Solution Approach 1:
The patent applies parameter changes by transitioning from binary (two-state) memory elements to multilevel (more than two-state) memory elements. This changes the state parameter of the memory element from 2 discrete values to N discrete values, enabling each memory element to store log2(N) bits of information instead of just 1 bit, thereby increasing memory capacity without proportionally increasing the number of memory elements
Solution Approach 2:
The patent employs dimensionality change by extending the state space of memory elements from one-dimensional (binary 0/1) to multi-dimensional (multiple remanent polarization states). This allows the memory system to utilize additional state dimensions, effectively packing more information into the same physical footprint and achieving higher bit density
2Quantity of substance
If the number of memory elements is increased to improve memory capacity, then the memory capacity increases, but the area occupied by the memory increases proportionally
Solution Approach 1:
The patent merges multiple binary memory functions into a single multilevel memory element. By combining the functionality of multiple single-bit memory cells into one multilevel element that can represent multiple states simultaneously, the patent achieves higher memory capacity within the same area, effectively merging what would have been separate memory elements into a compact multistate element
Solution Approach 2:
The patent implements multi-functionality by designing memory elements that can perform multiple storage functions within a single physical structure. Each multilevel memory element can store multiple bits of information through its multiple remanent states, making it a universal storage unit that replaces what would traditionally require multiple single-bit memory cells, thereby reducing the overall memory area required
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases bit density and memory capacity without a direct proportional increase in the number of memory elements, potentially leading to more efficient storage per area.
Implementation Method 1
memories that include state-programmable memory elements for storing the information... such as a ferroelectric capacitor that is capable of retaining the written information based on a programmed state that is retained even after its power source has been removed
Implementation Method 2
a memory element that is writable to at least three different remanent polarization states
Data Source
AI summary
Disclosed herein are devices, methods, and systems for reading/writing memory cells of a memory, where the memory cells includes a memory element that is writable to at least three different remanent polarization states. A sensing circuit determines, in a read operation, a stored state of the memory element from among the at least three different remanent polarization states based on a sensed change in a remanent polarization of the memory element caused by an applied read voltage. A biasing circuit applies, in a write operation, apply a bias voltage level across the memory element to (re)write the memory element to the stored state.