Multilevel Nonvolatile Memory Write Time Reduction
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Solution Overview
Problem
The multilevel nonvolatile semiconductor memory technology faces challenges in reducing write time as the number of bits stored in each memory cell increases, leading to prolonged data transfer times from the controller to the memory.
Innovation Solution
A multilevel nonvolatile semiconductor memory system that includes a data conversion circuit in the controller to convert x bits into y bits, reducing the number of bits transferred and generating 2y threshold distributions at the first step, followed by transferring x bits to generate 2x threshold distributions, thereby shortening the write time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bits stored in one memory cell increases to achieve high capacity, then the storage capacity is improved, but the data transfer time from controller to memory increases
Solution Approach 1:
The write operation is divided into two distinct phases: a first write operation that writes initial data to generate first threshold distributions, and a second write operation that writes additional data to generate second threshold distributions. This segmentation allows the controller to process and transfer data in manageable stages rather than all at once, reducing the overall data transfer time while maintaining high storage capacity through multilevel cells.
2Quantity of substance
If multilevel technology is adopted to store multiple bits in one memory cell, then the storage capacity increases, but the margins for threshold distributions become small causing erroneous write/read problems
Solution Approach 1:
The threshold distribution generation is segmented into two stages: first threshold distributions are generated with larger margins during the initial write operation, and second threshold distributions are generated during the subsequent write operation. This segmentation allows each stage to operate with appropriate margin requirements, improving reliability while achieving multilevel storage capacity.
Solution Approach 2:
The first write operation performs a preliminary action by generating initial threshold distributions that establish a foundation for the final data state. This preliminary threshold distribution generation creates larger initial margins that can then be refined in the second write operation, ensuring reliable data storage throughout the process.
Data Source
AI summary
According to one embodiment, a system includes a memory, a controller which controls an operation of the memory in a data program, and data bus which connects the memory to the controller. The memory comprises a memory cell array with memory cells which have a bit assignment to 2x (x is an integer number of 3 or more) threshold distributions, each memory cell storing x bits, and a control circuit which controls the data program of x bits to the memory cells. The controller comprises a first step generating y bit (y is an integer number and y<x) based on x bits, transferring y bit to the memory, and generating 2y threshold distributions based on y bit in the memory, and a second step executing after the first step, transferring x bits to the memory, and generating the 2x threshold distributions based on x bits in the memory.