Multi-Level Signal Sampling With Offset Clocks for Amplifier Delay
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Solution Overview
Problem
Memory systems face decoding errors due to propagation delays in amplifiers when processing multi-level signals, leading to asynchronous sampling issues.
Innovation Solution
Implement asynchronous operation of sampling circuits using offset clock signals to compensate for propagation delays in amplifiers, aligning sampling with symbol periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If synchronous sampling is used with multiple amplifiers, then sampling timing is simplified, but decoding errors occur due to propagation delays causing symbols to be sampled at edges instead of centers of symbol periods
Solution Approach 1:
The patent divides the sampling system into multiple independent sampling circuits, each associated with a specific amplifier and operating according to its own clock signal. This segmentation allows each sampling circuit to be optimized independently for its amplifier's propagation delay characteristics, resolving the contradiction by enabling precise sampling without requiring complex centralized timing control.
Solution Approach 2:
The patent implements dynamic clock signal offset adjustment where each clock signal's timing offset is specifically configured to compensate for its associated amplifier's propagation delay. This dynamic timing adjustment ensures that sampling occurs at the centers of symbol periods despite varying amplifier delays, achieving high sampling accuracy without oversimplifying the timing architecture.
2Productivity
If multiple amplifiers with different propagation delays are used, then signal processing capability is improved, but asynchronous sampling issues arise leading to decoding errors
Solution Approach 1:
The patent applies local quality by configuring each sampling circuit with clock signal characteristics specifically tailored to its associated amplifier's propagation delay. Instead of using a uniform timing approach, each amplifier-sampling circuit pair operates with optimized local timing parameters, ensuring that the multi-level signal is sampled at the correct phase for that specific amplifier, thus maintaining decoding accuracy while preserving signal processing capability.
Solution Approach 2:
The patent changes the timing parameter (offset) of each clock signal to match the propagation delay characteristics of its associated amplifier. By adjusting this critical parameter, the system compensates for amplifier variations and ensures that sampling occurs at optimal times, resolving the contradiction between processing capability and decoding reliability.
3Measurement precision
If sampling circuits operate asynchronously with offset clock signals, then decoding accuracy is improved by sampling near symbol period centers, but clock synchronization complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-configuring the offset clock signals with timing offsets that compensate for amplifier propagation delays before the actual sampling process begins. This advance timing arrangement ensures that when sampling occurs, the clock signals are already properly aligned with the symbol periods, achieving high decoding accuracy without requiring complex real-time synchronization adjustments.
Data Source
AI summary
Methods, systems, and devices for asynchronous multi-level signal sampling are described. A system may generate a first clock signal by delaying the master clock signal by a first duration that is based on a first propagation delay associated with a first amplifier for a data signal. The system may generate a second clock signal by delaying the master clock signal by a second duration that is based on a second propagation delay associated with a second amplifier for the data signal. The system may sample, by a first sampling circuit based on the first clock signal, a first amplified data signal outputted by the first amplifier. And the system may sample, by a second sampling circuit based on the second clock signal, a second amplified data signal outputted by the second amplifier.