Multi-mode In-memory Computing Array for TCAM CNN SNN Operations
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Solution Overview
Problem
The unique computation and operation modes of TCAM, CNN, and SNN limit the versatility of neuromorphic arrays, requiring a reconfigurable peripheral circuit array to support different modes for efficient in-memory computing.
Innovation Solution
A multi-mode array structure for in-memory computing, comprising an array of memory cells with function lines and complementary bit lines, enabling TCAM, CNN, and SNN operations by configuring memory cells to match search signals or calculate neural network weight values, using memristors and transistors integrated through a specific process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate arrays are designed for TCAM, CNN, and SNN operations, then each operation mode achieves optimal performance, but device complexity and integration difficulty increase significantly
Solution Approach 1:
The patent designs a universal in-memory computing array that can perform TCAM, CNN, and SNN operations using the same physical array structure. The memory cells are configured to support multiple computation modes through reconfigurable peripheral circuits, eliminating the need for separate dedicated arrays for each operation type while maintaining optimal performance for all three modes.
Solution Approach 2:
The patent implements dynamic reconfiguration capability where the peripheral circuits can be dynamically adjusted to support different operation modes (TCAM search, CNN convolution, SNN spiking neural network operations). This dynamic adaptability allows the same array to switch between different computation modes as needed, rather than being fixed to a single mode.
2Power
If von Neumann architecture is used, then data storage and computation are separated, but computing power is limited and energy efficiency is reduced
Solution Approach 1:
The patent merges data storage and computation functions into a single in-memory computing array structure. The memory cells directly perform computational operations on stored data without requiring data to be transferred to separate processing units, thereby overcoming the fundamental limitation of von Neumann architecture and enabling higher computing power with improved energy efficiency.
3Adaptability or versatility
If reconfigurable peripheral circuits are designed to support multiple operation modes, then versatility is improved, but circuit design complexity increases
Solution Approach 1:
The patent designs universal peripheral circuits that can be configured to support multiple operation modes (TCAM, CNN, SNN) rather than requiring separate dedicated circuits for each mode. This universal design approach improves versatility while controlling circuit complexity through shared circuitry and reconfiguration mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The multi-mode array supports diverse computation modes, enhances computing power, and enables large-scale parallelism with lower power consumption and improved accuracy, beyond the limitations of von Neumann architecture.
Implementation Method 1
three logic states, i.e., [0], [1], and [X (arbitrary)], are stored through the resistance value change of memory cell memristors
Implementation Method 2
The conductance of each memristor is a weight value, and signal data is input through a word line WL, a brain-like operation is performed on the data through arrays
Data Source
AI summary
The present disclosure relates to the technical field of semiconductor integrated circuits and discloses a multi-mode array structure for in-memory computing, and a chip, including: an array of memory cells, function lines corresponding to all the memory cells measured by rows in the array of memory cells, and complementary function lines and bit lines BL corresponding to all the memory cells measured by columns in the array of memory cells. According to the present disclosure, the TCAM function and CNN and SNN operations are enabled; the multi-mode array for in-memory computing herein goes beyond the limits of the von Neumann architecture by integrating the multiple modes of storage and computation, achieving efficient operation and computation; in addition to solving the computing power problem, a new array mode is provided to promote the development of high-integration circuits.