Compact Multipath RF Amplifier Transformers for Nonlinearity Reduction
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Solution Overview
Problem
Designing satisfactory radio-frequency amplifier circuitry for electronic devices is challenging due to non-linearity issues that introduce harmonic distortion, intermodulation components, and other performance degradations.
Innovation Solution
The implementation of radio-frequency amplifier circuitry with a power splitting transformer, a power combining transformer, and at least two amplifiers coupled in parallel between these transformers. This configuration reduces third-order non-linearity components and minimizes input capacitance variation, thereby improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single amplifier is used in the radio-frequency amplifier circuitry, then the device complexity is reduced, but non-linearity issues occur that introduce harmonic distortion and intermodulation components
Solution Approach 1:
The amplifier is divided into multiple parallel amplifier paths (first amplifier with first input transistors, second amplifier with second input transistors) instead of using a single amplifier. Each path processes the signal independently and their outputs are combined through a power combining transformer, which reduces non-linearity components while maintaining signal integrity
Solution Approach 2:
Multiple amplifier paths are merged through a power combining transformer that combines the output signals from the first and second amplifiers. The transformer merges the parallel paths into a single combined output signal, achieving both complexity management and non-linearity reduction
2Object-generated harmful factors
If different bias voltages are applied to multiple amplifiers, then non-linearity is reduced, but the device complexity increases
Solution Approach 1:
Different bias voltages (first bias voltage and second bias voltage at different voltage levels) are applied locally to each amplifier path through center taps of the transformers. This local differentiation optimizes the transconductance profile of each path independently, reducing overall non-linearity while maintaining manageable complexity through systematic configuration
3Object-generated harmful factors
If gate capacitance variations are not compensated, then the circuit design is simpler, but amplitude modulation to phase modulation non-linearity increases
Solution Approach 1:
The gate capacitance variations in the first amplifier path are compensated by opposite variations in the second amplifier path. The different bias voltages cause the gate capacitances to vary in opposite directions, and when the amplifier outputs are combined, these capacitance variations cancel each other out, reducing AMPM non-linearity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the performance of wireless circuitry by reducing amplitude modulation to amplitude modulation (AMAM) and amplitude modulation to phase modulation (AMPM) non-linearity, improving gain compression, in-band error vector magnitude (EVM), and out-of-band adjacent channel power ratio (ACPR).
Implementation Method 1
a power splitting transformer, a power combining transformer, and at least two amplifiers coupled in parallel between these transformers
Implementation Method 2
a power splitting transformer, a power combining transformer, and at least two amplifiers coupled in parallel between these transformers
Data Source
AI summary
Wireless circuitry is provided that includes at least a first amplifier, a second amplifier, and a power splitting transformer coupled to the first and second amplifiers. The first amplifier can include first input transistors, and the second amplifier can include second input transistors. The power splitting transformer can include a primary coil, a first secondary coil having terminals coupled to gate terminals of the first input transistors and having a center tap configured to receive a first bias voltage, and a second secondary coil having terminals coupled to gate terminals of the second input transistors and having a center tap configured to receive a second bias voltage. The first and second amplifiers may output signals to a power combining transformer. The power combining transformer can have a first primary coil, a second primary coil, and a secondary coil all disposed within a single compact transformer footprint.