Multiphase Divider Eliminates Phase Ambiguity Using Resetable Dividers
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Solution Overview
Problem
Conventional multiphase dividers suffer from phase ambiguity issues, leading to loss of monotonic phase increase and equally spaced phases in divided signals, and require high power consumption due to the need for a high-frequency reference signal in serial link receivers.
Innovation Solution
A method using resetable dividers and a reset signal generator with a combinational network to produce periodic reset signals, ensuring timely correct division of multiphase signals and maintaining a 50% duty cycle, thereby eliminating phase ambiguity and reducing power consumption by allowing a lower frequency reference signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional toggle flip-flops with cross-connected feedback paths are used for multiphase division, then the division operation can be performed in parallel, but phase ambiguity occurs and the monotonic phase increase characteristic is lost
Solution Approach 1:
The patent applies preliminary action by resetting the divider stages in a specific sequence before the division operation begins. The reset signal generator produces reset signals that force each divider stage to a known initial state (Q=0, Qb=1) in advance, eliminating phase ambiguity before the actual division occurs. This preliminary resetting ensures that the monotonic phase increase characteristic is maintained from the start of operation.
Solution Approach 2:
The patent uses feedback by monitoring the outputs of the divider stages and using this information to control the reset signal generation. The reset signal generator responds to the actual state of the dividers and adjusts the reset signals accordingly, creating a closed-loop system that ensures correct phase relationships are maintained throughout the division operation.
2Measurement precision
If a high-frequency reference signal is used in serial link receivers, then accurate phase division can be achieved, but power consumption increases
Solution Approach 1:
The patent changes the operational parameters of the divider stages by controlling their enable signals and reset sequences. By carefully timing when each divider stage is enabled and reset, the system achieves accurate phase division without requiring the reference signal to run at maximum frequency continuously. This parameter control allows the reference signal to operate at lower frequencies while maintaining division accuracy.
Solution Approach 2:
The patent implements periodic action through the sequential enabling and resetting of divider stages. Instead of operating all dividers continuously at high frequency, the system activates them in a periodic sequence synchronized with the reference signal, achieving accurate phase division only when needed. This reduces overall power consumption while maintaining the required phase division precision.
Data Source
AI summary
A method for dividing a plurality of multiphase signals comprising performing resetable divider stages to the plurality of multiphase signals forming a plurality of divided multiphase signals having a monotonic increasing phase with equal spacing and an ideal duty cycle of 50% through a plurality of resetable dividers, wherein the plurality of divided multiphase signals have no phase ambiguity; and producing a plurality of periodic reset signals to the plurality of resetable dividers to enable the plurality of resetable dividers to divide the plurality of multiphase signals in a timely correct sequence to form the divided multiphase signal through a reset signal generator, the plurality of periodic reset signals being produced by a combinational network of the reset signal generator, the combination network is configured for generating a number of pulses based on the plurality of multiphase signals and performing a plurality of decimation stages and wherein the periodic reset signals are generated solely in response to the plurality of multiphase signals.