Multi-Phase Algebraic ECC for High-Density Flash Memory
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Solution Overview
Problem
As flash memory devices increase storage density by storing multiple bits per cell, they also experience a higher bit error rate, which existing error correction coding (ECC) schemes struggle to efficiently address due to increased complexity, power consumption, and decoding latency.
Innovation Solution
A multi-phase ECC scheme using algebraic codes, where data is encoded with multiple sets of parity bits generated by different algebraic codes, allowing for improved error correction capability through a concatenation of shorter sub-codes joined by joint parity bits, reducing complexity and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If flash memory devices store multiple bits per cell to increase storage density, then storage density is improved, but bit error rate increases
Solution Approach 1:
The patent divides the error correction task into multiple phases using different algebraic codes. The first phase uses a first algebraic code for initial error correction, and the second phase uses a second algebraic code for additional error correction on remaining errors. This segmentation allows the system to handle higher bit error rates effectively while maintaining the high storage density achieved through multi-bit per cell storage.
2Reliability
If conventional ECC schemes are used to correct errors in high-density flash memory, then error correction capability is provided, but decoding complexity and latency increase
Solution Approach 1:
The patent segments the error correction process into two distinct phases, each using a different algebraic code. The first phase handles the majority of error correction with a first algebraic code, while the second phase addresses remaining errors with a second algebraic code. This segmentation reduces the complexity of each individual decoding phase compared to using a single complex code, while maintaining overall high error correction capability.
Solution Approach 2:
The patent implements a periodic two-phase decoding process. The first algebraic code is applied in the first phase for initial error correction, and if errors remain, the second algebraic code is applied in the second phase. This periodic application of different correction methods allows the system to achieve high error correction capability while managing decoding complexity through a structured, multi-stage approach.
3Reliability
If conventional ECC schemes are used to correct errors in high-density flash memory, then error correction capability is provided, but power consumption increases
Solution Approach 1:
The patent divides error correction into two phases using different algebraic codes. The first phase uses a first algebraic code to correct the majority of errors, and the second phase uses a second algebraic code only if errors remain. This segmentation allows the system to achieve high error correction capability while consuming less power, as the second phase is only activated when needed, rather than continuously using a single complex correction scheme.
4Reliability
If conventional ECC schemes are used to correct errors in high-density flash memory, then error correction capability is provided, but decoding latency increases
Solution Approach 1:
The patent segments the decoding process into two phases, with the first phase using a first algebraic code for initial error correction and the second phase using a second algebraic code for remaining errors. This segmentation reduces decoding latency because the first phase can quickly correct most errors, and the second phase is only executed when necessary, rather than using a single complex code that would require longer processing time for all cases.
Data Source
AI summary
A method includes a first encoding operation associated with a first algebraic error correcting code generating a first set of first parity bits corresponding to a first set of information bits and a second set of first parity bits corresponding to a second set of information bits. A second encoding operation associated with a second algebraic error correcting code generates a first set of second parity bits corresponding to the first set of information bits and a second set of second parity bits corresponding to the second set of information bits. A third encoding operation generates a set of joint parity bits. The first set of information bits, the second set of information bits, the first set of first parity bits, the second set of first parity bits, and the joint parity bits may be stored in a data storage device as a single codeword.