Multiphase Ring Oscillator With Level Shifters for Fast Clock Recovery
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Solution Overview
Problem
Existing multiphase oscillator circuits face challenges in achieving fast clock recovery and efficient power management, particularly in low power duty cycled systems, where clock frequency control and power consumption are critical for serial communication systems.
Innovation Solution
A multiphase oscillator circuit with a ring oscillator and multiple level shifters, where each stage of the ring oscillator generates a clock signal that is boosted by level shifters to higher voltage levels, allowing for tight frequency control and efficient power management through impedance state control, enabling fast startup and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional oscillators are used in low power duty cycled systems, then power consumption is reduced, but clock recovery time increases and frequency control accuracy deteriorates
Solution Approach 1:
The oscillator system is segmented into multiple independent phases (at least three phases), with each phase having its own oscillator stage and level shifter. This segmentation allows different phases to be independently controlled and activated, enabling selective startup of required phases to reduce power consumption while maintaining fast clock recovery capability when needed.
Solution Approach 2:
The circuit includes startup circuitry that pre-charges capacitors and prepares the oscillator stages before actual oscillation begins. This preliminary action reduces the startup time and enables faster clock recovery without requiring continuous power consumption, as the preparatory work is done only when the oscillator is activated.
2Use of energy by moving object
If traditional oscillators are used in low power duty cycled systems, then power consumption is reduced, but frequency control accuracy deteriorates
Solution Approach 1:
The oscillator frequency is controlled by changing the threshold voltage of transistors in the oscillator stages. By adjusting the gate voltage of control transistors, the switching threshold changes, which directly controls the oscillation frequency. This parameter change approach enables precise frequency control without requiring continuous power consumption, as the frequency can be set and maintained at a stable value.
Solution Approach 2:
The patent replaces traditional mechanical or continuous analog frequency control mechanisms with a digital-like voltage threshold control mechanism. By using transistor threshold voltage control, the system achieves precise frequency control through electrical parameter adjustment rather than mechanical tuning, enabling accurate frequency control in low power modes.
3Power
If voltage level boosting is implemented, then clock signal strength increases, but power consumption increases
Solution Approach 1:
The level shifters are activated periodically only when clock signal boosting is required, rather than continuously. The control logic enables level shifters to operate in sync with the oscillator phases, activating them only during periods when strong clock signals are needed for data transmission, and keeping them in high-impedance state during low power periods to minimize power consumption.
Solution Approach 2:
The level shifters dynamically switch between low-impedance operating state and high-impedance power-saving state based on system requirements. This dynamic state transition allows the circuit to provide strong clock signals when needed while consuming minimal power during low activity periods, resolving the contradiction between signal strength and power consumption.
4Productivity
If multiple clock phases are generated, then clock recovery efficiency improves, but device complexity increases
Solution Approach 1:
Multiple oscillator stages are merged into a single ring oscillator structure where the output of one stage feeds into the next, forming a closed loop. This merging approach generates multiple clock phases simultaneously from a single compact circuit rather than requiring separate oscillators for each phase, reducing overall device complexity while maintaining the productivity benefits of multiphase operation.
Solution Approach 2:
Each oscillator stage and level shifter is designed to perform multiple functions: generating clock phases, providing impedance control, and enabling power management. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby reducing overall device complexity while maintaining efficient clock recovery capability.
Data Source
AI summary
In described examples, a ring oscillator includes a series of N stages in a first ring. Each stage includes a respective output terminal coupled to a respective input terminal of a next one of the stages in the first ring. N is a positive odd-numbered integer of at least three. A series of N level shifters in a second ring are respectively connected to the N stages. Each level shifter receives a respective clock output from a respective output terminal of a stage to which it is connected and generates a respective boosted clock output in response thereto. The boosted clock output is coupled to control an impedance state of a next one of the level shifters in the second ring.