Pulse Generation By Logic Circuits TRIZ Cases
- Multiphase Ring Oscillator With Level Shifters for Fast Clock Recovery
Boosted clock phases and impedance-switched level shifters enable fast startup, accurate frequency control, and lower power use.
- Dual-Clock Timing for Fine Resolution in Low-Power Systems
A low-frequency clock runs continuously while a high-frequency clock wakes only for counting and timestamps, preserving precision with low power.
- Distributed Ring Oscillators for Local Voltage Drop Detection
Distributed DRO cells track local oscillator counts to expose voltage drops and speed bottlenecks in high-speed digital systems.
- Crystal-Free Radio Calibration Without Quartz Oscillators
Wireless calibration lets on-chip and free-running RF oscillators replace quartz crystals, cutting radio size, cost, and power.
- Detection Clock Pattern Generator for DRAM Clock Recovery
Pseudo-random or hold clock patterns from DRAM improve GPU clock recovery by reducing phase offset and locking time.
- Dual-Clock Timestamping for Low-Power Fine Time Resolution
A low-speed clock runs continuously while a high-speed clock wakes only near events or output edges to deliver precise timing with lower power.
- Programmable Delay Circuit for Glitch-Free Delay Switching
Static gate and multiplexer states prevent glitches during delay changes, enabling one-cycle switching with lower power and no step limits.
- Relaxation Oscillator Temperature Compensation Using Opposite TC Resistors
Opposite-temperature-coefficient resistors and matched capacitor ratios cancel first-order drift in a relaxation oscillator.
- Pseudo Pass-Gate Ring Oscillator for PVT Phase Realignment
A realignment signal reuses delay-chain transistors to align waveform phase and reduce PVT-driven phase noise without extra multiplexers.
- Digitally Calibrated Ring Oscillator for PVT-Stable Clocking
Digital leakage-current tuning and feedback calibration lock a ring oscillator to a reference clock for stable low-power timing across PVT variations.
- Two-Stage Ring VCO With Substrate Forward Bias for 0.5 V Operation
Substrate forward bias lowers transistor threshold voltage so a two-stage ring VCO can run at 0.5 V with low power and wide frequency tuning.
- Rotated-Phase-Tuning Oscillator for Wide mmW Frequency Range
Phase interpolation and rotation phase shifts tune mmW oscillators without varactors, widening frequency range while reducing phase noise.
- Selective Oscillator Circuit for Low-Power AI Product-Sum Processing
Pulse-based selective oscillators perform product-sum and accumulation operations at high speed with lower power and simpler AI hardware.
- Time-to-Digital Converter Using Dual Oscillator Phase Sampling
Dual oscillators and reference-clock sampling extract phase and frequency data to improve time-difference conversion despite jitter and process variation.
- Clock Skew Control Circuit to Avoid Double Cycle Compression
Edge-order-based delay adjustment reduces skew across clock domains while avoiding double cycle compression and setup-time violations.
- Clock Oscillator Inductive Source Swing for Low-Voltage Startup
Mutual inductance creates source-node voltage swing to sustain gate-to-source drive, enabling low-voltage oscillation with lower phase noise.
- Programmable Delay Buffer for PPS Phase Alignment
Selectable analog and digital delay stages align PPS signal edges across nodes, preserving duty cycle and reducing BER from routing shifts.