Multi-Phase Data Transmitter with Fewer Drivers and Lower Toggling

Solution Overview

Problem

Existing memory devices face challenges in efficiently transmitting data while minimizing power consumption and optimizing data output characteristics, particularly in systems utilizing multi-phase clock signals.

Innovation Solution

The implementation of a transmitter with data selectors, pre-drivers, and drivers that perform logical operations on data and clock signals to generate pull-up and pull-down signals, allowing sequential data output synchronized with multi-phase clock signals, reducing the number of drivers and minimizing toggling signals to conserve power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple drivers are used to output parallel data in parallel, then data transmission speed is improved, but power consumption increases and device complexity increases

Engineering Contradiction:

Improvedata transmission speedVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The data output function is segmented across multiple clock phases. The transmitter divides parallel data into multiple groups, each group being output during a specific clock phase (e.g., first and second data during first clock phase, third and fourth data during second clock phase). This segmentation allows sequential output using fewer drivers while maintaining high data transmission throughput.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The transmitter employs periodic clock signals with different phases to control data output. By using multi-phase clock signals (e.g., four phases for four data bits), the system achieves continuous data transmission through periodic activation of drivers at different time intervals, reducing the need for simultaneous driver operation and thus lowering power consumption.

Inventive Principle:

Principle #19Periodic action

2Productivity

If multiple drivers are used to output parallel data in parallel, then data transmission speed is improved, but device complexity increases

Engineering Contradiction:

Improvedata transmission speedVSAvoidnumber of drivers

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The data output function is segmented across multiple clock phases. The transmitter divides parallel data into multiple groups, each group being output during a specific clock phase (e.g., first and second data during first clock phase, third and fourth data during second clock phase). This segmentation allows sequential output using fewer drivers while maintaining high data transmission throughput.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The transmitter dynamically controls driver activation based on clock phase signals. Instead of having all drivers active simultaneously, the system dynamically enables only the necessary drivers for each clock phase, optimizing resource utilization and reducing overall device complexity.

Inventive Principle:

Principle #15Dynamics

3Ease of operation

If data selectors perform logical operations on all data and clock signals, then data output control is improved, but power consumption increases due to signal toggling

Engineering Contradiction:

Improvedata output controlVSAvoidpower consumption

Core Design Contradiction:

Ease of operationVSUse of energy by moving object

Solution Approach 1:

The data selectors perform logical operations only on the subset of data and clock signals relevant to the current clock phase. For example, during the first clock phase, only the first and second data selectors are actively processing signals, while other selectors remain inactive. This partial action reduces unnecessary signal toggling and associated power consumption.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The transmitter employs periodic clock signals with different phases to control data output. By using multi-phase clock signals (e.g., four phases for four data bits), the system achieves continuous data transmission through periodic activation of drivers at different time intervals, reducing the need for simultaneous driver operation and thus lowering power consumption.

Inventive Principle:

Principle #19Periodic action

Data Source

PatentUS12488816B2Transmitter, memory device and semiconductor device including the transmitter

Publication Date: 2025.12.02 SAMSUNG ELECTRONICS CO LTD

AI summary

A transmitter configured to receive first to N-th data in parallel and sequentially output the first to N-th data in response to first to N-th clock signals having different phases from each other, where N is an integer of at least 2, the transmitter including first to N-th data selectors including a first data selector and a second data selector in correspondence to the first to N-th data, each of the first to N-th data selectors being configured to perform a logical operation on one of the first to N-th data and the first to N-th clock signals and output a plurality of data selection signals, a first pre-driver in correspondence to at least two data selectors among the first to N-th data selectors, the first pre-driver being configured to receive the plurality of data selection signals from the at least two data selectors.