Multi-Plane Memory Programming With Long-Sense Slow Plane Detection
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Solution Overview
Problem
Existing non-volatile memory systems face challenges in determining which plane to terminate programming early to avoid neighbor plane disturb, especially when manufacturing defects are latent and affect data integrity during concurrent multi-plane programming.
Innovation Solution
A memory apparatus and method that groups memory cells into multiple planes, applies program pulses and verify pulses during iterations, and terminates programming of slower planes based on threshold voltage sensing with a long sense time to identify and address manufacturing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If programming is terminated early in slower planes to avoid neighbor plane disturb, then program disturb is reduced, but manufacturing defects cause false identification of slower planes leading to data corruption
Solution Approach 1:
The patent performs a preliminary sensing operation with an extended sense time before early program termination to accurately identify the slower plane. This preliminary action detects manufacturing defects that would otherwise cause false identification, ensuring the correct plane is selected for termination and preventing data corruption while still reducing program disturb.
2Measurement precision
If extended sense time is used to detect manufacturing defects, then measurement precision is improved, but programming time increases
Solution Approach 1:
The patent applies partial excessive action by using an extended sense time only for the initial plane identification, not for all subsequent sensing operations. This extended sensing duration exceeds the normal sense time to ensure defect detection, but is limited to the critical early stage where accurate plane identification is most important, thereby balancing measurement precision with programming time.
3Productivity
If early program termination is implemented, then productivity is improved by reducing total programming time, but device complexity increases due to additional sensing requirements
Solution Approach 1:
The patent segments the programming process into distinct phases: an initial extended sensing phase for accurate plane identification, followed by early termination of the identified slower plane, and continued programming of faster planes. This segmentation allows the system to implement complex defect detection and selective termination logic only where necessary, maintaining simplicity in the majority of the programming operation and improving overall productivity.
Data Source
AI summary
A memory apparatus has memory cells grouped into a first plane and a second plane and are configured to retain a threshold voltage corresponding to data states. A control means applies one of a plurality of program pulses followed by a verify pulse of at least one verify voltage to a group of the memory cells of the first plane and the second plane during one of a plurality of program-verify iterations. The control means terminates programming of one of the first plane or the second plane prior to completing programming of the one of the first plane or the second plane in response to determining the one of first plane or the second plane programs slower. The terminated plane is additionally determined based on sensing the threshold voltage of the memory cells for a long sense time longer than used during the one of the plurality of program-verify iterations.