Multiple Sized Solder Bumps for Flip Chip Reliability
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Solution Overview
Problem
Conventional semiconductor devices for flip chip applications have uniform solder bump sizes, which do not differentiate between signal carrying and mechanical/ground connections, leading to potential reliability issues as failures in ground/mechanical connections are less critical than signal carrying bumps, and existing technologies do not favor the integrity of signal carrying bumps at the cost of mechanical/ground connections.
Innovation Solution
The semiconductor device features under bump metallization (UBM) layers of the same dimension with different sized solder bumps, where signal carrying bumps have a larger diameter and height than mechanical/ground connection bumps, formed using a method involving photoresist layers and injection molding soldering to ensure improved reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform solder bump sizes are used for all connections, then manufacturing simplicity is maintained, but reliability is compromised because signal carrying bumps and mechanical/ground connections have different criticality requirements
Solution Approach 1:
The patent applies local quality by differentiating solder bump sizes based on their specific function: signal carrying bumps have larger diameter and height for greater reliability, while mechanical/ground connection bumps have smaller dimensions. This localized differentiation optimizes reliability for critical signal paths without unnecessarily complicating the entire device structure.
Solution Approach 2:
The patent segments the solder bump population into distinct size categories (first size for signal carrying, second size for mechanical/ground connections). This segmentation allows each group to be optimized independently for its specific function, resolving the contradiction between uniform manufacturing and differentiated reliability requirements.
2Reliability
If larger solder bumps are used for signal carrying connections, then signal integrity and reliability are improved, but manufacturing complexity increases due to multiple bump sizes
Solution Approach 1:
The patent employs preliminary action by forming all underbump metallization layers with the same dimension before selectively creating contact holes of different sizes. This preliminary uniform structure simplifies manufacturing setup, and the differentiation is introduced later through selective photoresist patterning and contact hole formation, making the multi-size process more manageable.
Solution Approach 2:
The patent changes the parameter of contact hole diameter selectively: contact holes for signal carrying bumps have greater diameter than those for mechanical/ground connections. This parameter change in the contact hole stage directly translates to different solder bump sizes, enabling functional differentiation while using a relatively simple process modification.
3Manufacturing precision
If different contact hole sizes are used to form different sized solder bumps, then bump differentiation is achieved, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies local quality by making contact holes of different diameters only where needed: larger contact holes are formed selectively for signal carrying bump locations, while smaller contact holes are formed for mechanical/ground connection locations. This localized differentiation achieves precise bump size control without requiring the entire contact hole pattern to be complex.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of semiconductor devices by providing greater areal contact for signal carrying bumps and allows for adjusted bonding forces for mechanical connections, improving the overall integrity and yield of the chip package.
Implementation Method 1
The contact holes are filled with a solder metal by an injection molding soldering process to form solder columns
Implementation Method 2
the solder columns reflowed to form the solder bumps configured to carry the signal and the solder bumps configured for ground planes and/or mechanical connections
Data Source
AI summary
A semiconductor structure and methods for the creation of solder bumps configured to carry a signal and solder bumps configured for ground planes and/or mechanical connections as well as methods for increasing reliability of a chip package generally include formation of multiple sized bump bonds on under bump metallization patterns and/or pads of the same dimension. The signal carrying solder bumps are larger in terms of diameter and bump height than solder bumps configured for ground plane and/or mechanical connections.

