Multiplexed Chip Pins for Server FPGA I/O Reuse
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Solution Overview
Problem
The limited number of FPGA/CPLD pins in a server chip is insufficient for controlling power-on timing and logic signals, leading to a lack of reusability and increased costs when attempting to provide more pins.
Innovation Solution
A system and method that utilizes a programmable device with a major logic communication module, detection module, storage module, and multiplexing pins to improve pin reusability by using two I/O pins to replace four pins, allowing for efficient communication and signal processing through an I2C communication module and a switch circuit to manage voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of FPGA/CPLD pins is increased, then the capability to control power-on timing and logic signals is improved, but the cost of the chip is increased
Solution Approach 1:
The patent implements a multiplexing mechanism where a limited number of physical pins are dynamically assigned to different functions based on system needs. The detection module identifies which functions are required, and the pin assignment module dynamically configures the pins to serve multiple purposes including power-on timing control, logic signal control, and device communication, thereby achieving high pin adaptability without increasing pin count or chip cost
2Adaptability or versatility
If the number of FPGA/CPLD pins is increased, then the pin reusability is improved, but the device complexity is increased
Solution Approach 1:
The system implements self-service through automated detection and configuration. The detection module automatically identifies which devices are present and what functions are needed, then the pin assignment module automatically configures the pins accordingly without requiring manual intervention. This self-configuring mechanism manages pin reusability complexity internally while presenting a simple interface to users
Solution Approach 2:
The patent incorporates feedback mechanisms where the detection module continuously monitors the system state, device presence, and pin usage. Based on this feedback, the pin assignment module dynamically adjusts pin configurations to optimize reusability. This closed-loop control enables the system to adapt to changing conditions while maintaining manageable complexity through automated decision-making
3Quantity of substance
If multiple functions are assigned to the same pin, then the pin resource usage is reduced, but the risk of voltage conflicts is increased
Solution Approach 1:
The patent employs dynamic pin configuration where pins can change their electrical characteristics (input/output mode, voltage level) based on real-time system conditions. The pin assignment module dynamically switches pins between different functional states, ensuring that only one function is active on each pin at any given time. This dynamic control prevents voltage conflicts by maintaining proper electrical states during function transitions
Solution Approach 2:
The system performs preliminary detection and configuration before actual pin usage. The detection module identifies required functions in advance, and the pin assignment module pre-configures pins to appropriate states before switching functions. This preliminary preparation ensures that voltage levels and electrical characteristics are properly set before any signal transmission, preventing voltage conflicts during operation
Data Source
AI summary
A method for providing more than one function to pins of a programmable device used in a server system includes the programmable device and first and second devices. The programmable device is electrically connected to the first device and the second device. The programmable device includes a major logic communication device, a detection module, a storage module, and at least one multiplexing pin. The second device is powered on, sending an in-position signal to the detection module through the at least one multiplexing pin. The detection module transmits the in-position signal to the storage module. The major logic communication module communicates with the first device through the at least one multiplexing pin. A system applying the method are also disclosed.


