Multiplexed TLB Direct Segment Paging
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Solution Overview
Problem
The limited size of Translation Lookaside Buffers (TLBs) restricts the number of pages cached, leading to a performance bottleneck in virtual memory performance due to the short window of time for translation, and increasing TLB size results in higher power consumption and heat production, while solutions like superpages cause fragmentation issues.
Innovation Solution
Implementing a multiplexed TLB that shares a direct segment for system paging, allowing an arbitrarily large virtual address space, with a partition code dividing the segment into occupied and unused parts, enabling demand paging and reducing fragmentation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of pages cached in the TLB is increased to increase TLB reach, then the TLB reach is improved, but the pipeline cycle time increases and power consumption increases
Solution Approach 1:
The patent divides the TLB into two separate segments: a direct-mapped segment for fast translation of frequently accessed pages and an associative segment for handling less frequently accessed pages. This segmentation allows the system to achieve high TLB reach while maintaining fast access times for the most critical translations, thereby resolving the contradiction between increasing TLB reach and maintaining pipeline cycle time.
Solution Approach 2:
The patent implements dynamic allocation of TLB entries based on access patterns. The direct-mapped segment provides deterministic fast access for pinned pages, while the associative segment dynamically adapts to capture recently accessed pages. This dynamic behavior allows the system to optimize between speed and reach based on actual workload characteristics.
2Quantity of substance
If the number of pages cached in the TLB is increased to increase TLB reach, then the TLB reach is improved, but power consumption increases
Solution Approach 1:
By segmenting the TLB into direct-mapped and associative portions, the patent enables the system to achieve extended TLB reach without proportionally increasing power consumption. The direct-mapped segment uses simpler, lower-power logic for fast access, while the associative segment handles only the necessary additional entries for extended reach, rather than expanding the entire TLB uniformly.
Solution Approach 2:
The patent applies different structural qualities to different parts of the TLB: the direct-mapped segment uses a simplified structure optimized for speed and low power consumption, while the associative segment uses a more complex structure only where needed to provide extended reach. This local differentiation allows the system to achieve high reach without uniformly increasing power consumption across the entire TLB.
3Quantity of substance
If superpages are used to increase the size of memory addressed by a page, then the TLB reach is improved, but fragmentation occurs
Solution Approach 1:
The patent segments the address space into pinned regions (direct segment) and unpinned regions (associative segment), allowing fine-grained control over which pages are kept in the TLB. This prevents the coarse-grained fragmentation caused by superpages, as individual pages can be pinned or unpinned independently based on their specific access patterns and requirements.
Solution Approach 2:
The patent implements dynamic page pinning and unpinning based on access patterns, allowing the TLB composition to adapt to changing workload requirements. This dynamic behavior prevents the static fragmentation inherent in superpage approaches, as pages can be flexibly allocated and deallocated from the TLB without being constrained by fixed superpage boundaries.
4Quantity of substance
If a direct segment is used to translate addresses in parallel to increase TLB reach, then the TLB reach is improved, but the mapped memory is not accessible for system usage such as paging
Solution Approach 1:
The patent creates a hybrid TLB structure where the direct-mapped segment provides fast translation for process pages while the associative segment serves dual purposes: caching additional process pages and providing space for system paging operations. This multi-functionality allows the system to maintain high TLB reach for processes while simultaneously preserving accessibility for critical system functions like paging.
Solution Approach 2:
By segmenting the TLB into dedicated and shared portions, the patent allows the direct-mapped segment to be optimized for fast process translation while the associative segment remains available for system usage. This segmentation resolves the conflict between dedicating space for process performance and preserving flexibility for system functions.
Data Source
AI summary
Disclosed herein are systems and methods for paging to a direct segment maintained by a multiplexed TLB. The multiplexed TLB defines a direct segment to directly map a virtual address range to a physical address range, which increases the reach of the multiplexed TLB. A partition code is maintained in the multiplexed TLB to indicate usage of the direct segment by an associated process. A management process, such as a system pager, uses the unused part of the direct segment for storing paged data. As the process continues to use more of the direct segment, paged data stored in the previously unused part of the direct segment can be evicted from memory or moved elsewhere in memory so that the process can continue to use the direct segment.