Multiplexer-Based Ternary Content Addressable Memory for FPGA
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Solution Overview
Problem
Existing RAM-based ternary content addressable memory (TCAM) implementations in programmable ICs, such as FPGAs, are inefficient in terms of memory usage as they require multiple memory cells per bit to represent all possible states, leading to exponential reduction in memory efficiency with increasing key width and are limited by minimum RAM sizes, resulting in suboptimal performance.
Innovation Solution
A multiplexer-based TCAM is implemented using programmable interconnect elements and logic in FPGAs, where the input key controls multiplexers to generate a match vector, requiring only two memory cells per TCAM bit, significantly improving memory efficiency by reducing the number of memory cells needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If RAM-based TCAM implementation is used, then the system can store TCAM data, but memory efficiency decreases exponentially with increasing key width requiring multiple memory cells per bit
Solution Approach 1:
The patent changes the fundamental parameter of how TCAM data is stored and accessed. Instead of using RAM-based storage that requires multiple memory cells per bit, the invention uses multiplexer-based selection where the key directly controls multiplexer selection lines. This parameter change reduces the memory cell requirement from exponential to constant (two memory cells per TCAM bit regardless of key width), directly resolving the contradiction between quantity of substance and productivity.
2Device complexity
If minimum RAM sizes are used, then the device complexity is reduced, but the key width is limited and performance becomes suboptimal
Solution Approach 1:
The multiplexer-based TCAM structure provides universality by allowing the same basic circuit architecture to support any key width without requiring different memory structures. The key width is only limited by the number of multiplexers available in the programmable logic, not by minimum RAM size constraints. This makes the design adaptable to various applications with different key width requirements while maintaining relatively simple device complexity.
Data Source
AI summary
In one example, a ternary content addressable memory (TCAM) includes an input port coupled to receive a W-bit key as input, and an output port coupled to provide a match vector as output, the match vector including at least one bit. The TCAM further includes a memory having memory cells operable to store N*W pairs of bits for N W-bit TCAM words. The memory includes a plurality of memory outputs. The TCAM further includes at least one compare circuit. The at least one compare circuit includes at least one multiplexer each coupled to receive as input a true version and a complement version of a bit of the W-bit key. Each of the at least one multiplexer is controlled by a respective pair of memory outputs of the plurality of memory outputs. The at least one compare circuit further includes combinatorial logic coupled to perform at least one logical AND operation based on output of the at least one multiplexer.