Integrated Multiplexer Capacitor Layout for Second Harmonic Suppression
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Solution Overview
Problem
The existing multiplexers using piezoelectric thin film resonators face issues with increased filter size and capacitance tolerance due to the use of chip capacitors, leading to unwanted spurious signals like second harmonics, which are difficult to suppress effectively.
Innovation Solution
A multiplexer design incorporating a piezoelectric thin film resonator and an acoustic wave resonator with a capacitor having electrodes facing each other on the same substrate, reducing the size and capacitance tolerance, and utilizing a notch circuit with a capacitor and inductor connected in series between the common terminal and ground to suppress second harmonics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a chip capacitor is coupled to a filter including a piezoelectric thin film resonator, then the filter can suppress second harmonics, but the filter size increases and capacitance tolerance becomes large
Solution Approach 1:
The patent merges the capacitor with the substrate by forming electrodes directly on the substrate surface, integrating what was previously a separate chip capacitor component into the substrate structure itself, thereby reducing overall filter size while maintaining second harmonic suppression functionality
Solution Approach 2:
The patent introduces a dielectric film as an intermediary layer between the electrodes formed on the substrate, creating a compact capacitor structure that achieves the desired capacitance value without requiring a separate chip capacitor, thus reducing filter size while maintaining electrical performance
2Object-generated harmful factors
If a chip capacitor is coupled to a filter including a piezoelectric thin film resonator, then the filter can suppress second harmonics, but capacitance variation becomes large
Solution Approach 1:
The patent merges the capacitor fabrication process with the substrate manufacturing process, allowing precise control of capacitance values through controlled formation of electrodes and dielectric films during substrate processing, thereby reducing capacitance variation and improving manufacturing precision
Solution Approach 2:
The patent enables precise control of capacitance parameters by adjusting the thickness, area, and permittivity of the dielectric film and the dimensions of the electrodes during substrate fabrication, allowing optimization of capacitance values with tight tolerances rather than relying on commercial chip capacitor variations
3Area of stationary object
If a capacitor is located on a substrate including a piezoelectric thin film resonator, then the structure is compact, but unnecessary spurious such as second harmonics occurs
Solution Approach 1:
The patent applies local quality by forming the capacitor electrodes and dielectric film in specific locations on the substrate away from the piezoelectric thin film resonator, creating regions with different functional properties - the resonator region maintains its acoustic wave properties while the capacitor region provides electrical tuning without generating spurious signals
Solution Approach 2:
The patent uses the dielectric film as an intermediary that enables capacitor functionality on the substrate without direct interaction between the capacitor electrodes and the piezoelectric thin film resonator, preventing the generation of spurious signals while maintaining the compact integrated structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the second harmonic output by approximately 20 dBm, maintaining transmission and suppression characteristics similar to comparative examples while minimizing duplexer size and capacitance variation.
Implementation Method 1
a first filter that includes a piezoelectric thin film resonator
Implementation Method 2
a second filter that includes an acoustic wave resonator and is connected between the common terminal and a second terminal, the acoustic wave resonator including an IDT
Implementation Method 3
a capacitor that includes a pair of electrodes facing each other in a planar direction and is coupled to the first filter
Data Source
AI summary
A multiplexer includes: a first filter that includes a piezoelectric thin film resonator and is connected between a common terminal and a first terminal, the piezoelectric thin film resonator being located on a substrate; a second filter that includes an acoustic wave resonator and is connected between the common terminal and a second terminal, the acoustic wave resonator including an IDT located on a piezoelectric substrate; and a capacitor that includes a pair of electrodes facing each other in a planar direction and is coupled to the first filter, the pair of electrodes being located on the piezoelectric substrate.