Multiplier-Divider Error Offset Circuit for Active PFC
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Solution Overview
Problem
Conventional multiplier-dividers in active PFC circuits suffer from errors due to manufacturing variations and temperature changes, limiting efficiency in regulating current phase and power utilization.
Innovation Solution
A multiplier-divider circuit incorporating a buffer, three sets of differential converters, two dividers, two multipliers, and a pulse generator, which uses peak detectors and voltage integrators to isolate and reset signals, thereby offsetting accumulated error coefficients through controlled period and voltage relationships.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional multiplier-divider circuits are used in active PFC circuits, then the circuit can perform multiplication and division functions to regulate current phase, but manufacturing variations and temperature changes cause errors in calculation results that limit power utilization efficiency
Solution Approach 1:
The patent introduces a feedback mechanism where the output signal from the multiplier-divider is fed back to the input through a feedback resistor. This feedback loop continuously monitors and corrects calculation errors caused by manufacturing variations and temperature changes, ensuring the output remains accurate and reliable in the PFC circuit application.
Solution Approach 2:
The patent employs parameter changes by using temperature-compensated resistors and capacitors with specific temperature coefficients. These components are designed to counteract the effects of temperature variations on circuit operation, maintaining stable calculation results across different operating conditions and reducing error offsets.
2Ease of manufacture
If manufacturing variations are present in integrated circuits, then production flexibility is maintained, but resistance values and current generation become inconsistent causing errors proportional to the divisor signal
Solution Approach 1:
The patent uses matched resistor pairs and identical component layouts in differential signal paths to create copies of the same circuit function. By ensuring both paths have identical characteristics, any manufacturing variations affect both paths equally, causing errors to cancel out in the differential output, thus maintaining precision despite manufacturing variations.
Solution Approach 2:
The patent designs the circuit to operate with equalized potential conditions across differential pairs, ensuring that both signal paths experience the same voltage and current conditions. This equipotential approach ensures that manufacturing variations in components like resistors affect both paths uniformly, eliminating their impact on the final calculation result.
3Productivity
If the multiplier-divider is used to regulate current phase in continuous current mode PFC circuits, then power utilization efficiency can be improved above 80%, but errors from temperature and manufacturing variations prevent achieving the designed efficiency value
Solution Approach 1:
The patent replaces traditional mechanical adjustment methods with electronic software-based compensation. A microcontroller or DSP processes the output signal and dynamically adjusts control parameters to compensate for calculation errors, enabling the system to achieve and maintain the designed power utilization efficiency despite hardware variations and temperature changes.
Data Source
AI summary
A multiplier-divider capable of offsetting errors includes a plurality of multiplication and division units to perform processes and arrangements so that errors generated by signals passing through the multiplier-divider are offset. As a result impact of the errors is reduced. More than one processing signal can be obtained from the same power supply to reduce loss of external sampling.