Multiply-Accumulate Circuit for Signed and Unsigned Multiplication
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Solution Overview
Problem
Existing multiply-accumulate circuits are not compatible with both signed and unsigned number operations, leading to incorrect results when different data types are input, and existing solutions either require sign bit extension, increasing resource consumption, or introduce complex circuitry and additional elements, complicating design and power consumption.
Innovation Solution
A multiplier and multiply-accumulate circuit design that accommodates both signed and unsigned numbers by utilizing partial product generation and summing circuits, along with input and output processing to handle different data types without sign bit extension, and incorporates additional adding circuits for signed numbers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If sign bit extension is used to handle signed numbers, then compatibility with signed number operations is improved, but resource consumption increases
Solution Approach 1:
The patent applies local quality by treating the highest bit of the second multiplicator differently based on the data type. For signed numbers, the highest bit is negated to represent the sign, while for unsigned numbers, it is treated as a regular magnitude bit. This localized differentiation allows the same hardware circuit to handle both signed and unsigned operations without requiring full sign bit extension, thereby improving adaptability while controlling resource consumption.
2Adaptability or versatility
If complex circuitry is introduced to support both data types, then adaptability is improved, but device complexity increases
Solution Approach 1:
The patent uses inversion by negating the highest bit of the second multiplicator when it represents a signed number. Instead of adding complex sign handling logic, the invention inverts the treatment of the highest bit: for signed numbers, it is negated to become a sign indicator, while for unsigned numbers, it remains as a magnitude bit. This simple inversion approach enables dual data type support without increasing circuit complexity.
Solution Approach 2:
The patent achieves universality by designing a multiplier circuit that can handle both signed and unsigned number operations using the same hardware structure. The partial product generation circuit and partial product summing circuit are configured to automatically adapt to the data type through the treatment of the highest bit, eliminating the need for separate circuits for signed and unsigned operations. This multi-functional design improves adaptability while keeping device complexity low.
3Measurement precision
If additional adding circuits are incorporated for signed numbers, then accuracy for signed operations is improved, but power consumption increases
Solution Approach 1:
The patent merges the signed number handling functionality into the existing partial product summing circuit. The additional adding circuit is not a separate independent component but is integrated with the partial product summing logic. By combining the sign handling addition with the existing accumulation operation, the circuit achieves accurate signed number processing while minimizing additional power consumption through shared hardware resources.
Data Source
AI summary
The present disclosure relates to a multiplier, a multiply-accumulate circuit, an operational circuit, a processor, and a calculation apparatus. The operational circuit includes an input processing circuit and the multiply-accumulate circuit. The input processing circuit receives a first number and outputs the first number as a first multiplicator for feeding into the multiply accumulate circuit by negating a sign bit of the first number in a case in which the first number is a signed number, and directly outputs the first number as the first multiplicator for feeding into the multiply-accumulate circuit in a case in which the first number is an unsigned number. The input processing circuit further receives a previously known second number and directly outputs the second number as a second multiplicator for feeding into the multiply-accumulate circuit. The multiply-accumulate circuit includes a multiplication subcircuit and an accumulation subcircuit.