Multi-Rate DAC Pre-Distortion Using Delta-Sigma Fractional Correction
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Solution Overview
Problem
High-speed digital-to-analog converters (DACs) face a trade-off between static and dynamic nonlinearity, where improving dynamic performance with small parasitic capacitance results in poor static matching, and digital pre-distortion (DPD) methods, often implemented using look-up tables, become complex and power-intensive, especially at high clock frequencies required for applications like 5G and radar systems.
Innovation Solution
A system comprising two DACs and a digital pre-distortion circuit that includes a look-up table, a combiner circuit, a quantizer, and a delta-sigma modulator to generate combined signals with integer and fractional coefficients, compensating for non-linearity and quantization errors, with the second DAC operating at an oversampling frequency to reduce complexity and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital pre-distortion is implemented using a full look-up table for high-speed DACs, then dynamic performance is improved, but device complexity and power consumption increase significantly
Solution Approach 1:
The patent divides the pre-distortion correction into two separate components: an integer coefficient handled by a standard DAC and a fractional coefficient handled by a delta-sigma modulator. This segmentation allows each component to be optimized independently, reducing the overall complexity of the DPD system while maintaining high dynamic performance.
Solution Approach 2:
The patent introduces a multi-rate architecture where the delta-sigma modulator operates at an oversampled rate compared to the main DAC. This dimensional change in sampling rate allows the fractional coefficient to be processed at a higher frequency, improving dynamic performance without requiring the main DAC to operate at excessively high speeds.
2Measurement precision
If unit cells with small parasitic capacitance are used to improve dynamic performance, then dynamic performance is improved, but static matching performance deteriorates
Solution Approach 1:
By separating the DAC transfer function into integer and fractional components, the patent allows the main DAC to use unit cells optimized for static matching (larger capacitance) while the delta-sigma modulator handles the dynamic correction with smaller parasitic capacitance, thus resolving the trade-off between static and dynamic performance.
3Productivity
If clock frequency is increased to meet application requirements, then productivity is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent employs multi-rate processing where the delta-sigma modulator operates at an oversampled frequency that is a multiple of the main DAC clock frequency. This allows the system to meet high-frequency application requirements by processing the fractional coefficient at a higher rate without forcing the entire system to operate at that frequency, thereby reducing complexity and power consumption.
Data Source
AI summary
A method of applying digital pre-distortion includes: outputting, by a look-up table, a first table value based on an input digital signal; adding the first table value and the input digital signal to generate a first combined signal comprising a first combined value having a first integer coefficient and a first fractional coefficient; separating the first integer coefficient from the first fractional coefficient to generate a first integer signal representing the first integer coefficient and a first fractional signal representing the first fractional coefficient; generating a delta-sigma modulated signal based on the first fractional signal; converting, by a first digital-to-analog, a first digital signal into a first analog signal, wherein the first digital signal is representative of the first integer signal; and converting, by a second DAC, a second digital signal into a second analog signal, wherein the second digital signal is representative of the delta-sigma modulated signal.