Multirow Semiconductor Chip Interconnects with Repeaters
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Solution Overview
Problem
Conventional interconnect chips are limited in their ability to connect semiconductor chips that are not adjacent to each other due to the length of conductive traces required, which restricts the distance they can span and the number of chips they can interconnect effectively.
Innovation Solution
The use of an interconnect chip with a thick conductive power distribution layer and repeaters allows for longer conductive traces, enabling communication between non-adjacent semiconductor chips by distributing power through a slotted plane and using through silicon vias, along with a layered interconnect structure that includes passive and active interconnect paths to reduce signal delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If conventional interconnect chips use standard conductive traces, then the chip structure remains simple and easy to manufacture, but the distance span and number of interconnectable chips are limited
Solution Approach 1:
The interconnect chip is segmented into multiple functional layers: a substrate layer, a power distribution layer with through-silicon vias, and an interconnect layer with signal traces. This segmentation allows each layer to be optimized independently, enabling longer distance spans without proportionally increasing overall complexity.
Solution Approach 2:
The patent transitions from a planar two-dimensional trace layout to a three-dimensional layered structure. By adding vertical dimensionality through stacked layers and through-silicon vias, the interconnect chip achieves longer effective path lengths while maintaining a compact footprint, thus increasing distance span without linearly increasing surface area complexity.
2Length of stationary object
If the interconnect chip spans greater distances to connect non-adjacent chips, then signal delay increases and transmission reliability decreases
Solution Approach 1:
Repeaters are introduced as intermediary components within the interconnect chip to regenerate and retime signals traversing long distances. These repeater circuits act as mediators that break the long signal path into shorter segments, maintaining signal integrity and reliability across greater overall distances between adjacent chips.
Solution Approach 2:
The long interconnect paths are segmented into multiple shorter segments by inserting repeater circuits at intermediate points. Each segment becomes a manageable unit with controlled signal delay, and the overall transmission reliability is improved by cascading multiple reliable short segments rather than relying on a single long unreliable path.
3Power
If thicker conductive layers and through silicon vias are used to distribute power, then power distribution capability improves, but manufacturing complexity increases
Solution Approach 1:
The power distribution function is segmented from the signal interconnect function, with a dedicated power distribution layer containing thick conductors and through-silicon vias separate from the signal traces. This segmentation allows the power layer to be optimized for high current capacity while the signal layer maintains manufacturing simplicity, resolving the contradiction between power capability and ease of manufacture.
Solution Approach 2:
Through-silicon vias act as intermediary conductive elements that bridge the substrate and upper power distribution layers. These vias provide low-resistance vertical power pathways that enhance overall power distribution capability without requiring the entire interconnect structure to be redesigned, thus improving power delivery with minimal impact on manufacturing processes.
Data Source
AI summary
A method of manufacturing a semiconductor device includes mounting an interconnect chip to a redistribution layer structure and mounting a first, second, and third semiconductor chip to the redistribution layer structure, where the second semiconductor chip is interposed between the first and the third semiconductor chips, and the interconnect chip communicatively couples the first, second and third, semiconductor chips to one another.