Multistage Round Robin Arbitration for Low-Latency Fair Access

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Solution Overview

Problem

Conventional round robin arbitration schemes suffer from high latency and reduced clock frequency as the number of request signals and queues increase, leading to inefficient access to common resources.

Innovation Solution

A multistage round robin arbitration architecture that includes logical gates, round robin arbiters, and a multiplexer to process request signals in a pipelined fashion, ensuring fair access among multiple users by alternating between users and request signals, thereby reducing latency and increasing operating clock frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If scanning arbiters are used to facilitate access grants as quickly as possible, then access grant speed is improved, but latency increases as the number of request signals increases

Engineering Contradiction:
Improveaccess grant speedVSAvoidlatency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The arbitration process is divided into multiple stages: a first round robin arbiter that selects among users, and a second round robin arbiter that selects among request signals within the selected user's queue. This segmentation allows parallel processing and reduces the time to grant access while maintaining low latency even as the total number of request signals increases.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arbitration is organized in a two-dimensional hierarchy: the first arbiter operates at the user level (selecting which user's queue to service), and the second arbiter operates at the request signal level (selecting which specific request to grant). This dimensional organization reduces latency by enabling concurrent arbitration operations across different levels.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of time

If the window size is increased to reduce latency, then latency is reduced, but clock frequency decreases

Engineering Contradiction:
ImprovelatencyVSAvoidclock frequency
Core Design Contradiction:
Loss of timeVSSpeed

Solution Approach 1:

The arbitration logic is segmented into two independent arbiters operating at different levels. Each arbiter processes a smaller subset of signals simultaneously, allowing the system to maintain a smaller effective window size for each arbitration stage while still covering a large total number of request signals. This enables high clock frequency to be maintained while achieving low overall latency through parallel staged processing.

Inventive Principle:
Principle #1Segmentation

3Productivity

If conventional round robin arbitration is used, then all request signals from the same user are processed before processing request signals from another user, but this results in unfair access among users

Engineering Contradiction:
Improveprocessing throughputVSAvoidfairness of access
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The arbitration is segmented into two independent stages: the first round robin arbiter fairly selects among different users, and the second round robin arbiter handles request signals within the selected user's queue. This ensures that multiple users receive fair access to the common resource by alternating selection among users, while still efficiently processing multiple request signals from each user when needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first round robin arbiter periodically cycles through different users in a round robin fashion, selecting one user's queue at a time. This periodic alternation among users ensures fair access distribution while the second arbiter processes requests within the currently selected user's queue, achieving both fairness and efficiency.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10949258B1Multistage round robin arbitration in a multiuser system
Publication Date: 2021.03.16 XILINX INC
  • US10949258B1 patent drawing
  • US10949258B1 patent drawing
  • US10949258B1 patent drawing

AI summary

A device includes a first and a second stage round robin arbitrations receiving request signals associated with a first, a second and a third user. At least one request signal for each of the first, the second, and the third user is asserted to access a common resource. The first stage round robin arbitration selects the first, the second, and the third user in a round robin fashion, at a first, a second, and a third iteration. The second stage round robin arbitration receives the user selection and the plurality of request signals and at the first, the second, and the third iteration grants access to the common resource to one request signal associated with the first, the second, and the third user. At each subsequent iteration the first stage round robin arbitration selects a different user and grants access to another request signal until all request signals are processed.