Multi-threaded FPGA Routing with Bounding Box Segmentation
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Solution Overview
Problem
Existing parallel routing algorithms for FPGAs and ASICs are not deterministic, leading to inconsistent results and require significant overhead for data synchronization, which hampers efficiency and testing reliability.
Innovation Solution
A multi-threaded routing procedure that generates bounding boxes around net terminals to limit the search scope in the routing resource graph, allowing nets with non-intersecting boxes to be routed in parallel, thereby optimizing resource utilization and reducing synchronization overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel routing algorithms are used to utilize multi-core processors, then routing throughput is improved, but synchronization overhead and data broadcasting requirements increase significantly
Solution Approach 1:
The patent divides the routing problem into independent segments by assigning different nets to different threads. Each thread processes its assigned nets independently without requiring synchronization with other threads, eliminating the need for data broadcasting and synchronization overhead while maintaining parallel processing throughput
Solution Approach 2:
The patent performs preliminary partitioning of nets into groups that can be processed independently by different threads. By pre-organizing the routing tasks before parallel execution, the system avoids the need for runtime synchronization and data exchange between threads, thus maintaining high throughput without synchronization overhead
2Productivity
If parallel routing algorithms are used to reduce routing time, then productivity is improved, but determinism is lost resulting in inconsistent routing results
Solution Approach 1:
The patent segments the routing problem into independent net groups processed by different threads. Each thread executes the same deterministic routing algorithm on its assigned nets, ensuring that given the same input, each thread produces consistent results. This segmentation allows parallel execution to maintain determinism while achieving speedup
Solution Approach 2:
The patent changes the parameter of thread execution from shared-state parallel processing to independent parallel processing. Each thread operates with its own copy of necessary data structures and processes nets independently, ensuring deterministic behavior while maintaining parallel execution speed
3Productivity
If bounding boxes are used to limit search scope, then routing efficiency is improved, but routing flexibility is reduced
Solution Approach 1:
The patent segments the routing search space into bounding boxes for different net groups processed by different threads. Each thread searches only within its assigned bounding box, improving efficiency by avoiding unnecessary searches. The segmentation allows the system to maintain flexibility for each individual net while achieving overall efficiency through parallel processing
Solution Approach 2:
The patent applies partial action by limiting each thread's search to its specific bounding box rather than the entire routing resource graph. This partial search scope is sufficient for finding valid routes for each net group while dramatically improving efficiency. The system accepts that each thread performs a more focused (partial) search rather than a complete search
Data Source
AI summary
A method for designing a system to be implemented on a target device includes generating bounding boxes on the target device for nets in the system where a bounding box identifies routing resources available for routing its corresponding net. The nets in the system are assigned to a plurality of threads to be routed. The threads are executed so that a plurality of the nets are routed in parallel within their corresponding bounding box.