Multiplexing Testline Structure for IC Parametric Testing
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Solution Overview
Problem
Conventional testline structures in integrated circuit manufacturing are inadequate for advanced technologies, as they limit the number of test devices, lose correlation with real integrated circuit performance, and require extensive resources for design-for-manufacturability and statistical analysis, leading to increased costs and inefficiencies in wafer testing.
Innovation Solution
A multiplexing circuit (MUX testline) is introduced, featuring address pads, forcing pads, and sensing pads connected through a selection circuit, allowing for selective access and testing of multiple test devices on a semiconductor substrate, along with Kelvin connections for IR drop compensation to enhance accuracy and flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional testline structure is used, then testline implementation is simple, but the number of test devices is limited
Solution Approach 1:
Multiple test devices are merged into a single testline structure through the multiplexing circuit. The selection circuit enables one testline to access multiple test devices sequentially by decoding address signals and activating corresponding switches, thereby increasing the number of test devices per testline without proportionally increasing testline count.
Solution Approach 2:
The testline structure is made universal by enabling a single testline to serve multiple test devices through the multiplexing circuit. The selection circuit and switch matrix provide multi-functionality, allowing the same testline to be dynamically configured to test different devices based on address codes, thus increasing device capacity without linearly increasing testline infrastructure.
2Productivity
If conventional testline structure is used, then testline design is straightforward, but testline space utilization is low
Solution Approach 1:
The multiplexing circuit merges multiple test device access paths into a single testline, dramatically improving space utilization. By combining what would require multiple separate testlines into one shared resource with dynamic switching, the system achieves higher productivity per unit area while managing complexity through modular switch and decoder design.
3Quantity of substance
If conventional testline structure is used, then testing resources are limited, but meeting advanced technology testing needs requires tremendous amount of test structures
Solution Approach 1:
The multiplexing circuit creates a universal testline that can dynamically adapt to test different devices and structures. This multi-functional capability allows a single testline to replace what would traditionally require multiple dedicated testlines, thereby accommodating the tremendous number of test structures needed for advanced technology while maintaining or improving testing efficiency through systematic address-based device selection.
4Measurement precision
If conventional testline structure is used, then generic testline devices are provided, but correlation with real integrated circuit performance is lost
Solution Approach 1:
The multiplexing circuit enables local quality by allowing different test devices with specific characteristics to be selectively activated based on their location and function. Each test device can be precisely targeted and tested individually through address decoding, enabling accurate correlation between test results and actual integrated circuit performance while maintaining a relatively simple overall testline structure through the use of standard switching and decoding components.
Data Source
AI summary
A testline structure made for integrated circuit tests is presented. The structure includes an array of testline pads formed in the scribe line area or integrated circuit die area on a semiconductor substrate, a plurality of test devices formed under the pads area, and a select circuit selectively connecting one of the test devices. The testline structure of this invention enables access to a large number of test devices through the same number of pads as on a conventional testline and can be employed to conduct parametric, reliability, and functional tests on the same. A source measurement unit (SMU) in a conventional integrated circuit tester is employed to sense and force predetermined test conditions on the test device terminals and conduct accurate Kelvin tests on the selected device. A method of using this testline structure is also presented.