MxN Systolic Array Mode Switching for Processing Element Utilization
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Solution Overview
Problem
Systolic arrays often have low utilization due to inefficient use of processing elements, leading to reduced performance and unnecessary current consumption during matrix multiplication operations in convolution neural networks.
Innovation Solution
A processing system with a systolic array that includes row and column buffers to dynamically switch the direction of input data and weights based on operational modes, ensuring maximum utilization of processing elements by optimizing the matrix multiplication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a systolic array uses a fixed configuration for matrix multiplication, then the structure is simple, but the utilization of processing elements is low
Solution Approach 1:
The patent implements dynamic mode switching between row-major and column-major configurations. The systolic array can switch its operational mode based on the dimensions of input matrices, allowing processing elements to be dynamically reassigned. This is achieved through configurable data flow paths that can be redirected via mode selection signals, enabling the same hardware to adapt to different computational requirements and maintain high utilization across varying workloads.
2Ease of operation
If the systolic array processes only square matrices, then the data flow is simple, but the adaptability to different matrix dimensions is limited
Solution Approach 1:
The patent creates a universal systolic array that can handle both row-major and column-major matrix multiplications using the same hardware infrastructure. By implementing dual data flow paths and mode selection logic, the system achieves multi-functionality where a single array configuration can process various matrix dimensions (M×N where M≠N) by switching between operational modes, eliminating the need for separate specialized arrays for different matrix types.
3Device complexity
If the systolic array operates in a single mode, then the control logic is simple, but the performance efficiency varies with different input sizes
Solution Approach 1:
The patent implements dynamic mode switching between row-major and column-major configurations. The systolic array can switch its operational mode based on the dimensions of input matrices, allowing processing elements to be dynamically reassigned. This is achieved through configurable data flow paths that can be redirected via mode selection signals, enabling the same hardware to adapt to different computational requirements and maintain high utilization across varying workloads.
Data Source
AI summary
A processing system may include a systolic array including a plurality of processing elements (PEs) arrayed in M rows and N columns, where M and N are natural numbers and M is not equal to N. The processing system may further include a row buffer configured to transmit row data to the systolic array in a row direction, and a column buffer configured to transmit column data to the systolic array in a column direction. When the processing system is in a first mode, the row data is input data and the columns data is weights. When the processing system is in a second mode the row data is the weights and the column data is the input data.