3D NAND Memory Array Structure for Charge Migration Control

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Solution Overview

Problem

Vertically-stacked memory cells in NAND architecture face issues with charge depletion due to vertically-migrating charge in storage-material strings, affecting the retention of data in non-volatile memory arrays.

Innovation Solution

The method involves forming memory arrays with strings of memory cells using a 'gate-last' or 'replacement-gate' process, where channel openings are etched through insulative and conductive tiers, and the storage material is modified to have varying intrinsic charge-transmissivity by diffusing species like oxygen or using radiant energy, ensuring that storage material in insulative tiers is less charge-transmissive than in conductive tiers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If vertically-stacked memory cells are used in NAND architecture, then memory density is improved, but charge depletion occurs due to vertically-migrating charge in storage-material strings

Engineering Contradiction:
Improvememory densityVSAvoiddata retention
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by creating different charge-transmissivity regions within the storage material. Specifically, the storage material in insulative tiers is made less charge-transmissive compared to the storage material in conductive tiers. This spatial variation in charge-transmissivity properties prevents charge migration from conductive to insulative tiers, thereby maintaining data retention while preserving the high density benefits of vertically-stacked memory cells.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the physical parameter of charge-transmissivity in the storage material by diffusing oxygen species into the storage material regions. This parameter change reduces the charge-transmissivity of storage material in insulative tiers, effectively blocking charge migration and preventing charge depletion that would otherwise occur in vertically-stacked NAND memory structures.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If storage material is made less charge-transmissive in insulative tiers, then charge migration is controlled, but manufacturing complexity increases

Engineering Contradiction:
Improvecharge migration controlVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the charge-blocking structure during the memory fabrication process itself, rather than as a separate post-processing step. The oxygen diffusion into storage material is integrated into the existing manufacturing sequence, occurring after storage material formation but before final device assembly. This preliminary integration reduces overall manufacturing complexity despite the additional processing step required.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the retention of data by controlling charge migration between the control-gate and storage material, improving the reliability and longevity of non-volatile memory arrays.

Implementation Method 1

modifying the intrinsic charge-transmissivity of the storage material of the storage material strings in the insulative tiers or in the conductive tiers

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

using a 'gate-last' or 'replacement-gate' process, where channel openings are etched through insulative and conductive tiers, and the storage material is modified to have varying intrinsic charge-transmissivity by diffusing species like oxygen or using radiant energy

Methodology Applied
Scientific EffectRadiation: Radiation

Data Source

PatentUS11751393B2Memory arrays and methods used in forming a memory array comprising strings of memory cells
Publication Date: 2023.09.05 MICRON TECHNOLOGY INC
  • US11751393B2 patent drawing
  • US11751393B2 patent drawing
  • US11751393B2 patent drawing

AI summary

A memory array comprising strings of memory cells comprises a vertical stack comprising alternating insulative tiers and conductive tiers. The strings of memory cells in the stack comprise channel-material strings and storage-material strings extending through the insulative tiers and the conductive tiers. At least some of the storage material of the storage-material strings in individual of the insulative tiers are intrinsically less charge-transmissive than is the storage material in the storage-material strings in individual of the conductive tiers. Other aspects, including method, are disclosed.