NAND Array Discharge Control for Program Boosting Power Reduction

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Solution Overview

Problem

Conventional array discharge methods in NAND flash memory consume excessive power, impacting scalability and storage density due to unnecessary discharge of all subblocks, including selected and unselected cells, which weakens the boosting process.

Innovation Solution

Implement a control signal strategy that selectively shuts down unselected subblocks during the pulse and verify recovery phases, minimizing discharge energy by preventing charge introduction into inhibited pillars, particularly in unselected subblocks sharing different source-side select gates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If conventional array discharge methods are used to equalize and discharge all subblocks, then charge equalization is achieved, but power consumption increases substantially

Engineering Contradiction:
Improvecharge equalizationVSAvoidpower consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The patent divides the NAND flash memory array into selected subblocks and unselected subblocks, applying different discharge strategies to each segment. Only selected subblocks undergo full discharge and equalization operations, while unselected subblocks are excluded from these power-intensive operations, thereby reducing overall power consumption while maintaining necessary charge equalization where needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies discharge and equalization operations selectively to specific regions (selected subblocks) rather than uniformly across the entire array. This localized approach ensures that power-consuming operations are performed only where necessary to maintain boosting efficiency, while unselected subblocks are left untouched, optimizing the balance between charge stability and power consumption.

Inventive Principle:
Principle #3Local quality

2Reliability

If all subblocks are discharged and equalized, then boosting process is maintained, but scalability and storage density are negatively impacted

Engineering Contradiction:
Improveboosting processVSAvoidscalability and storage density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the memory array operations into selected and unselected subblocks, applying discharge and equalization only to selected subblocks. This segmentation allows the system to maintain reliable boosting processes where needed while avoiding unnecessary operations in unselected subblocks, thereby improving overall scalability and storage density without compromising reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs discharge and equalization operations partially, only on selected subblocks rather than all subblocks. This partial action is sufficient to maintain boosting efficiency in the selected regions while avoiding the excessive power consumption and scalability limitations that would result from applying the same operations to the entire array.

Inventive Principle:
Principle #16Partial or excessive action

3Stability of the object's composition

If unselected subblocks are included in discharge operations, then complete charge equalization is achieved, but power consumption increases by more than 75%

Engineering Contradiction:
Improvecharge equalizationVSAvoidpower consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by moving object

Solution Approach 1:

The patent extracts unselected subblocks from the discharge and equalization operations, removing them from the power-intensive processing stream. This extraction allows the system to achieve necessary charge equalization in selected subblocks while eliminating the excessive power consumption that would result from including unselected subblocks in the same operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies discharge and equalization operations with local quality, tailoring the treatment to each subblock's selection status. Selected subblocks receive full discharge and equalization to maintain charge stability, while unselected subblocks are excluded from these operations, thereby achieving adequate charge equalization with significantly reduced power consumption.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12573454B2Power efficient array discharge for program boosting
Publication Date: 2026.03.10 INTEL NDTM US LLC
  • US12573454B2 patent drawing
  • US12573454B2 patent drawing
  • US12573454B2 patent drawing

AI summary

Systems, apparatuses and methods may provide for technology that issues a program pulse to a selected subblock of a NAND memory array, conducts a pulse recovery phase after the program pulse, and shuts down unselected subblocks in the NAND memory array during the pulse recovery phase.