3D NAND Memory Array Structure With Molybdenum Edge Connections

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Solution Overview

Problem

Existing memory array fabrication methods face challenges in efficiently forming memory cells with precise electrical connections and structural integrity, particularly in vertically-stacked NAND architectures, which affect data retention and access speeds.

Innovation Solution

The method involves forming memory arrays with alternating insulative and conductive tiers, using conductive molybdenum-containing metal material for edges, silicon nitride regions, and insulator layers to enhance electrical coupling and structural stability of memory cell strings, including recessed edges and lateral extensions to ensure direct connections and insulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional fabrication methods are used for vertically-stacked memory cells, then manufacturing process is simpler, but electrical connectivity and structural integrity are insufficient

Engineering Contradiction:
Improveelectrical connectivity and structural integrityVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory array is divided into alternating insulative tiers and conductive tiers, with each tier forming distinct functional layers. This segmentation allows for optimized electrical connections at each level while maintaining overall structural integrity, resolving the contradiction between reliability and fabrication simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Conductive molybdenum-containing metal material is specifically applied to laterally-outer edges of conductive tiers, while silicon nitride is used for insulator material. This local differentiation of material properties enhances electrical connectivity where needed while providing targeted insulation, improving reliability without requiring complete process redesign.

Inventive Principle:
Principle #3Local quality

2Reliability

If precise electrical connections are formed in memory cells, then data retention and access speeds improve, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedata retention and access speedsVSAvoidprecision of electrical connections
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The conductive molybdenum-containing metal material and silicon nitride insulator layers are formed in advance during the fabrication process, creating pre-positioned electrical connection pathways. This preliminary action ensures precise electrical connections are established before final memory cell assembly, improving data retention and access speeds while managing manufacturing precision requirements through staged fabrication.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If alternating insulative and conductive tiers are formed with lateral extensions, then electrical coupling is enhanced, but device structure becomes more complex

Engineering Contradiction:
Improveelectrical couplingVSAvoidtier structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive molybdenum-containing metal material is merged with the laterally-outer edges of conductive tiers, and silicon nitride is integrated as the insulator material within the same tier structure. This merging of functional materials into unified tiers enhances electrical coupling while consolidating structural complexity into standardized repeating units, making the complex structure more manageable and manufacturable.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20260082893A1Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells And Memory Arrays Comprising Strings Of Memory Cells
Publication Date: 2026.03.19 MICRON TECHNOLOGY INC
  • US20260082893A1 patent drawing
  • US20260082893A1 patent drawing
  • US20260082893A1 patent drawing

AI summary

A method used in forming a memory array comprising strings of memory cells comprises forming memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Individual of the conductive tiers comprise laterally-outer edges comprising conductive molybdenum-containing metal material extending horizontally-along its memory block. Channel-material strings extend through the insulative tiers and the conductive tiers. At least one of conductive or semiconductive material is formed extending horizontally-along the memory blocks laterally-outward of the laterally-outer edges comprising the conductive molybdenum-containing metal material that extends horizontally-along its memory block. Insulator material extending horizontally-along the memory blocks is formed laterally-outward of the at least one of the conductive or the semiconductive material that is laterally-outward of the laterally-outer edges comprising the conductive molybdenum-containing metal material. Other embodiments, including structure independent of method, are disclosed.