3D NAND Memory Array Layout for Precise String Alignment

The patent applies preliminary action by forming alignment marks and sacrificial structures before forming the memory cell strings. The alignment marks are created in the substrate prior to depositing alternating conductive and insulative layers, ensuring that subsequent layers can be precisely aligned to these pre-established references. This preliminary positioning enables accurate alignment of vertical memory cell strings without requiring complex real-time adjustment during fabrication.

The patent uses sacrificial material as an intermediary structure during fabrication. These sacrificial layers are formed between the conductive and insulative tiers, serving as temporary placeholders that define precise spatial positions. After the memory cell strings are formed around these sacrificial structures, the sacrificial material is removed, leaving behind precisely positioned voids that are subsequently filled with conductive material. This intermediary approach enables accurate alignment without requiring direct positioning of final conductive structures.

The patent segments the memory array formation into distinct modular layers: alternating conductive tiers and insulative tiers are deposited in sequence, with each tier serving a specific function. The channel-forming material is segmented into discrete strings positioned in voids between these tiers. This segmentation allows complex three-dimensional memory structures to be built through repeated deposition cycles, making the fabrication process more manageable and scalable while achieving high storage density.

The patent implements nesting by forming channel-material strings within voids created by removing sacrificial material from between conductive and insulative tiers. The conductive tiers are nested within insulative tiers, and channel strings are nested within the structural framework provided by alternating tiers. This nested arrangement enables compact integration of multiple functional elements in a vertically-stacked configuration, achieving high storage density without proportionally increasing fabrication complexity.

The patent uses sacrificial material as an intermediary to define precise trench positions and dimensions. These sacrificial structures are formed before the final trench formation, serving as templates that ensure accurate alignment with surrounding conductive and insulative layers. After memory cell strings are formed around these sacrificial structures, they are removed to create precisely positioned trenches. This intermediary approach ensures reliable electrical coupling without requiring complex direct-positioning methods.

The patent applies preliminary action by forming alignment marks and sacrificial structures before creating the final trenches. These preliminary structures establish precise spatial references that guide subsequent trench formation and ensure proper alignment with conductive tiers. By preparing these reference structures in advance, the patent simplifies the overall process while achieving high precision, as later steps can follow established templates rather than requiring complex real-time positioning.