NAND String Select Transistor Biasing to Prevent Breakdown

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Solution Overview

Problem

The application of a negative voltage to string select transistors in non-volatile memory devices can lead to a voltage difference exceeding the breakdown voltage, potentially damaging the transistors, necessitating a method to protect these transistors and reduce discharge time.

Innovation Solution

A non-volatile memory device and operating method that includes applying a program voltage, comparing it with a negative discharge reference voltage, and controlling the discharge voltage to the substrate of string select transistors using a negative discharge manager, thereby preventing excessive voltage differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a negative voltage is applied to the substrate of a string select transistor to reduce discharge time, then the discharge time is reduced, but the voltage difference between the substrate and gate may exceed the breakdown voltage, potentially damaging the transistor

Engineering Contradiction:
Improvedischarge timeVSAvoidtransistor breakdown risk
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent applies dynamic voltage adjustment by changing the substrate voltage from a first voltage level during program execution to a second voltage level during verify operations. This dynamic switching allows the system to optimize discharge time during programming while preventing breakdown during verification, resolving the contradiction between speed and reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter of the substrate based on operational phase. By comparing the program voltage with a reference voltage and selectively applying different substrate voltages (first voltage or second voltage), the system adjusts the electrical parameters to achieve both fast discharge and transistor protection

Inventive Principle:
Principle #35Parameter changes

2Productivity

If a negative discharge voltage is applied to reduce discharge time, then the discharge operation is faster, but excessive voltage difference may cause transistor breakdown

Engineering Contradiction:
Improvedischarge operation speedVSAvoidvoltage breakdown damage
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a voltage comparison mechanism that acts as an intermediary between the program voltage and the substrate voltage application. By comparing program voltage with a reference voltage and conditionally applying substrate voltage based on this comparison, the system mediates between the need for fast discharge and the need to prevent harmful voltage breakdown

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies preliminary protection by setting the substrate voltage to a safe level before verify operations begin. The control circuit proactively prevents excessive voltage difference from occurring by switching to a protective voltage level in advance, countering the potential harmful effect before it can manifest

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS12573457B2Non-volatile memory device and operating method thereof including a negative discharge voltage
Publication Date: 2026.03.10 SAMSUNG ELECTRONICS CO LTD
  • US12573457B2 patent drawing
  • US12573457B2 patent drawing
  • US12573457B2 patent drawing

AI summary

An operating method of a non-volatile memory device including a plurality of cell strings connected to a plurality of word lines, string select lines, and ground select lines includes applying a program voltage to a selected word line among the word lines during a program execution period, determining a discharge voltage by comparing the program voltage with a negative discharge reference voltage during the program execution period, applying a precharge voltage, which is less than the program voltage and greater than the discharge voltage, to the string select lines up to a first time point during a verify period following the program execution period, and applying the discharge voltage to a substrate of a string select transistor, which is connected to an unselected string select line among the string select lines, up to a second time point after the first time point during the verify period.