3D NAND Deck Assembly With Buffer Layer Against Material Shaving

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Solution Overview

Problem

Existing methods for forming integrated memory devices, particularly NAND memory, face challenges in maintaining structural integrity and performance due to issues like material shaving during fabrication processes, leading to impaired device functionality.

Innovation Solution

A method involving the formation of a buffer material within trenches and the use of a hard stop to prevent material removal during subsequent etching steps, ensuring precise alignment and integrity of memory cell structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching processes are used to form memory cell structures, then manufacturing simplicity is maintained, but material shaving occurs leading to impaired structural integrity

Engineering Contradiction:

Improvestructural integrityVSAvoidprocess complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

A buffer material layer is deposited beforehand in the trenches before forming the memory cell structures. This preliminary action creates a protective foundation that prevents material shaving during subsequent etching processes, ensuring structural integrity without requiring complex process modifications.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The buffer material acts as an intermediary layer between the trench substrate and the memory cell structures. This intermediate layer absorbs mechanical stresses and prevents direct contact between etching tools and the structural materials, thereby preventing material shaving while maintaining manufacturing simplicity.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If buffer material and hard stop structures are added to prevent material shaving, then structural integrity is improved, but manufacturing complexity increases

Engineering Contradiction:

Improvedevice reliabilityVSAvoidmanufacturing ease

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The buffer material layer is designed with specific thickness parameters and material properties that optimize its protective function. By carefully controlling the buffer layer thickness and composition, the structure achieves enhanced reliability while minimizing the impact on manufacturing processes through standard deposition techniques.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS12588212B2Integrated assemblies, and methods of forming integrated assemblies

Publication Date: 2026.03.24 LODESTAR LICENSING GROUP LLC

AI summary

Some embodiments include an integrated assembly having a first deck. The first deck has first memory cell levels alternating with first insulative levels. A second deck is over the first deck. The second deck has second memory cell levels alternating with second insulative levels. A cell-material-pillar passes through the first and second decks. Memory cells are along the first and second memory cell levels and include regions of the cell-material-pillar. An intermediate level is between the first and second decks. The intermediate level includes a buffer region adjacent the cell-material-pillar. The buffer region includes a composition different from the first and second insulative materials, and different from the first and second conductive regions. Some embodiments include methods of forming integrated assemblies.