3D NAND Program Disturbance Detection by Cell State Counting
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Solution Overview
Problem
The challenge in 3D NAND flash memory is the difficulty in identifying and addressing program disturbances, which cause dispersed threshold voltage distributions and read errors due to variations in adjusted threshold voltages among memory cells, making it hard to determine the severity of program disturbances during verification steps.
Innovation Solution
A control method for memory devices that counts the number of memory cells in a predetermined potential state before and after programming, using reference voltages to determine program disturbances by comparing first and second number values, allowing identification of memory cell areas with severe disturbances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If programming operations are performed on memory cells to store data, then data storage capacity is improved, but program disturbances occur causing threshold voltage dispersion and read errors
Solution Approach 1:
The patent performs a read operation and counts memory cells in predetermined potential states immediately after programming, before normal operations continue. This preliminary verification action identifies program disturbances early, allowing the system to mark affected memory cell areas and prevent future read errors, thus resolving the reliability issue without sacrificing storage capacity
Solution Approach 2:
The patent establishes a feedback mechanism where the count of memory cells in predetermined potential states after programming is compared against expected values. When deviations are detected indicating program disturbances, the system provides feedback by marking the affected memory cell areas, which then informs subsequent operations to avoid these problematic areas, thereby maintaining read accuracy
2Reliability
If verification steps are performed during programming to check for errors, then read accuracy is improved, but the difficulty of detecting and measuring program disturbances increases due to dispersed threshold voltage distributions
Solution Approach 1:
Instead of attempting to verify the entire memory cell array uniformly, the patent applies local quality verification by counting memory cells in predetermined potential states specifically in the memory cell area that was just programmed. This localized approach focuses detection resources on the relevant area, making program disturbance detection feasible despite dispersed threshold voltage distributions across the entire array
Solution Approach 2:
The patent changes the verification parameter from checking individual threshold voltage values (which are dispersed and difficult to measure) to counting the number of memory cells in predetermined potential states. This parameter transformation converts a difficult continuous measurement problem into a simpler discrete counting problem, reducing detection difficulty while maintaining reliability
Data Source
AI summary
Disclosed are a memory device and a control method thereof. The memory device may be a high-capacity and high-performance three-dimensional NAND flash memory. The control method includes the following steps. Data for performing a programming operation on a specific memory cell area is obtained. A number of memory cells in a predetermined potential state in the data are counted as a first number value. The programming operation is performed on the specific memory cell area based on the data. A read operation is performed based on a reference voltage corresponding to the predetermined potential state. A number of memory cells in the predetermined potential state in the specific memory cell area after the programming operation are counted as a second number value. Whether the specific memory cell area has program disturbances is determined based on the first number value and the second number value.