2Plane Programming for NAND Flash Memory Data Reliability
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Solution Overview
Problem
Modern mobile devices face data corruption issues due to sudden power failures during programming in NAND flash memory storage, which affects data reliability and performance, especially when programming pages with most significant bits (MSBs), leading to potential booting deadlocks and increased busy time for backup operations.
Innovation Solution
Implementing a 2Plane programming method where data is programmed into a first page and simultaneously backed up into a second page located in a different plane of the memory, reducing the need for additional backup time and enhancing reliability by hiding backup time within the programming process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is programmed into MSB pages of NAND flash memory, then data capacity and integration are improved, but data reliability deteriorates due to potential corruption affecting both current and associated pages
Solution Approach 1:
The patent performs backup of associated LSB pages into dedicated backup locations before programming MSB pages. This preliminary action ensures that if power failure occurs during MSB programming, the original LSB data remains intact and can be used for recovery, thus preventing the reliability issue while maintaining high data capacity
2Reliability
If backup operations are performed before programming MSB pages, then data reliability is improved, but programming speed and productivity deteriorate due to additional busy time
Solution Approach 1:
The patent merges the backup operation with the programming operation by programming both the main MSB page and the backup page simultaneously in a single programming cycle. This combining of operations eliminates the need for separate backup time, maintaining data reliability while preserving programming speed and productivity
3Device complexity
If backup pages are stored in the same plane as main pages, then device complexity is reduced, but reliability deteriorates because power failure during programming affects both main and backup pages
Solution Approach 1:
The patent segments the memory into distinct planes, storing backup pages in a different plane from the main pages. This segmentation ensures that power failure during programming of one plane does not affect the other plane, thus protecting backup integrity and improving reliability while maintaining manageable device complexity
Data Source
AI summary
A storage device, an electronic device, and a corresponding method for programming a memory are provided. The memory includes a plurality of cells. Each of the cells stores a plurality of bits. The bits of the memory are arranged into a plurality of pages of the memory. The method includes the following steps: receiving a host command for programming data into a first page of the memory; and performing 2Plane programming to program the data into the first page and backups the data into a second page of the memory when the first page does not consist of the most significant bits (MSBs) of the cells. The first page and the second page are located in different planes of the memory.