NAND Flash Bad Column Detection and Management

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Solution Overview

Problem

Existing NAND flash memory systems face inefficiencies in detecting and managing bad columns, leading to suboptimal data storage and retrieval due to manufacturing defects, where entire chunks of columns are replaced instead of addressing individual faulty columns, and the severity of column errors is not distinguished, affecting data reliability.

Innovation Solution

A method and system for detecting bad columns in a NAND flash memory array by generating column error statistics, defining bad columns based on error thresholds, and applying encoding schemes that include bit skipping, bit replacement, and bad column spreading to optimize data distribution and error correction, allowing for more precise management of faulty columns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If entire chunks of columns are replaced instead of individual faulty columns, then manufacturing simplicity is maintained, but data storage efficiency and reliability deteriorate

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoiddata storage reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent segments the column replacement process from chunk-level to individual column-level. Instead of replacing entire chunks of columns when defects are detected, the system identifies and replaces only the specific faulty columns. This segmentation enables precise defect management, improving data storage efficiency and reliability while maintaining manufacturing simplicity through automated column-level identification and replacement mechanisms.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If column errors are not distinguished by severity, then detection process remains simple, but data reliability and error correction effectiveness deteriorate

Engineering Contradiction:
Improvedetection process complexityVSAvoiddata reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies local quality by distinguishing different severity levels of column errors and applying appropriate error correction strategies to each level. The system categorizes column errors into different severity classes and implements targeted correction mechanisms for each class, rather than treating all errors uniformly. This approach improves data reliability while maintaining manageable detection process complexity through systematic error classification.

Inventive Principle:
Principle #3Local quality

3Ease of operation

If bad columns are not accurately identified, then management process remains simple, but bit error rates and data distribution quality deteriorate

Engineering Contradiction:
Improvemanagement process simplicityVSAvoidcolumn identification accuracy
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent implements preliminary action by performing comprehensive column testing and identification before final data storage operations. The system conducts thorough column-level diagnostics to accurately identify faulty columns, establishes detailed error statistics, and creates replacement mappings in advance. This preliminary identification process ensures high accuracy in bad column detection while maintaining operational simplicity through pre-established correction protocols and automated replacement mechanisms.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9786388B1Detecting and managing bad columns
Publication Date: 2017.10.10 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9786388B1 patent drawing
  • US9786388B1 patent drawing
  • US9786388B1 patent drawing

AI summary

A system, computer readable medium and a method. The method may include sending input data to a NAND flash memory unit that comprises the NAND flash memory array and instructing the NAND flash memory unit to write input data to the NAND flash memory array to provide programmed data; reading from the NAND flash memory array the programmed data to provide read data; comparing the input data and the read data to provide column errors statistics at a column resolution; and defining, by a flash memory controller, bad columns of the NAND flash memory array in response to the column error statistics.