NAND Flash Controller Upper Page Skip for Data Reliability
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Solution Overview
Problem
NAND flash memory experiences data reliability issues when powered off during write operations, as data written to an upper page can fail and simultaneously destroy data in the corresponding lower page, impairing the memory's storage capacity and reliability.
Innovation Solution
A storage device with a controller that skips the upper page of a physical sector during write operations, ensuring data written by previous commands are not affected, even if the memory is powered off, by writing data to the lower page of a physical sector that has not been previously written to.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is written to an upper page that shares a memory cell with a lower page, then the data storage capacity is increased, but the reliability of previously written data is degraded because power loss during write operation destroys both pages
Solution Approach 1:
The patent segments the write operation into two distinct phases: first writing to the lower page, then writing to the upper page. This segmentation ensures that if power is lost during the write process, only the upper page write is affected while the lower page data remains intact. The controller tracks which pages have been successfully written and manages the write sequence to prevent data loss.
Solution Approach 2:
The patent performs preliminary writing to the lower page before attempting to write to the upper page. By completing the lower page write first and confirming its success, the system establishes a safe baseline state. This preliminary action ensures that even if the subsequent upper page write fails due to power loss, the data already written to the lower page is preserved.
2Productivity
If the memory writes data from a page next to previously written pages, then the write operation efficiency is improved, but the risk of data loss increases when power is lost during the write process
Solution Approach 1:
The controller performs preliminary validation and tracking of written pages before proceeding with subsequent writes. It maintains awareness of which pages have been successfully written and uses this information to determine the safe next write target, ensuring continuous operation while preventing data loss.
Solution Approach 2:
The system implements feedback mechanisms where the controller continuously monitors the write operation status and power supply state. Based on this feedback, it dynamically adjusts the write sequence and selects appropriate target pages, ensuring that write operations proceed efficiently while maintaining data integrity through real-time decision-making.
Data Source
AI summary
According to one embodiment, a storage device includes a nonvolatile memory including physical sectors each of which comprises memory cells commonly connected to a word line, each of the memory cells being capable of storing data of not less than 2 bits, each of the physical sectors including pages corresponding to the number of bits storable in the memory cell, and a controller configured to receive a first write command and to write data associated with the first write command to the nonvolatile memory. In a write process using the first write command, the controller is configured to skip an upper page of a physical sector whose lower page is write-accessed by a second write command prior to the first write command.