NAND Flash Memory Fg-Fg Interference Reduction

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Solution Overview

Problem

Flash memory devices face significant interference issues due to capacitive coupling between adjacent memory cells, known as floating gate-floating gate (Fg-Fg) interference, which becomes more pronounced as process scaling advances and multilevel cell (MLC) threshold voltage distributions become more sensitive, affecting programming precision and accuracy.

Innovation Solution

A programming method that checks and optionally programs adjacent memory cells before programming the target cell's upper page, ensuring that intermediate pages are not skipped, thereby reducing Fg-Fg interference by verifying and adjusting the threshold voltage distributions to maintain precise control over the programming process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If process scaling is advanced to increase memory density, then memory density is improved, but Fg-Fg interference increases due to stronger coupling coefficients between adjacent memory cells

Engineering Contradiction:

Improvememory densityVSAvoidFg-Fg interference

Core Design Contradiction:

Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by programming intermediate pages before programming the target upper page. This preliminary programming of adjacent memory cells establishes stable boundary conditions that prevent Fg-Fg interference during subsequent programming operations, thereby maintaining programming precision while enabling process scaling for higher memory density

Inventive Principle:

Principle #10Preliminary action

2Quantity of substance

If MLC threshold voltage distribution is expanded to store multiple bits, then storage capacity is improved, but Fg-Fg interference increases due to greater threshold voltage distribution shifts

Engineering Contradiction:

Improvestorage capacityVSAvoidFg-Fg interference

Core Design Contradiction:

Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent implements preliminary action by ensuring intermediate pages are programmed before accessing upper pages in MLC structures. This preliminary programming stabilizes the threshold voltage distributions and boundary conditions, preventing excessive shifts and Fg-Fg interference that would otherwise compromise the integrity of multi-bit storage

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent applies segmentation by dividing the programming process into sequential stages corresponding to different pages (intermediate pages first, then upper pages). This segmented approach allows each segment to be programmed with proper boundary conditions established by previously programmed segments, maintaining threshold voltage control across the entire MLC structure

Inventive Principle:

Principle #1Segmentation

3Productivity

If programming of adjacent memory cells is performed without checking intermediate pages, then programming speed is improved, but programming precision deteriorates due to uncontrolled Fg-Fg interference

Engineering Contradiction:

Improveprogramming speedVSAvoidprogramming precision

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by implementing a check-and-program sequence where intermediate pages are verified to be programmed before proceeding to upper pages. This preliminary verification ensures boundary conditions are stable, maintaining programming precision without significantly impacting overall programming speed through the efficient page-mapping sequence

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively minimizes Fg-Fg interference, maintaining accurate threshold voltage distributions and reducing the impact of adjacent page programming on target cells, especially in multilevel cell flash memory systems, thereby enhancing programming precision and reliability.

Implementation Method 1

Programming of adjacent memory cells could change the boundary condition for the memory cell to be programmed, and increase the threshold voltage Vt needed to be programmed properly. This phenomenon is referred to as floating gate-floating gate (Fg-Fg) interference.

Methodology Applied

Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS8194448B2Technique to reduce FG-FG interference in multi bit NAND flash memory in case of adjacent pages not fully programmed

Publication Date: 2012.06.05 INTEL NDTM US LLC

AI summary

A method of reducing floating gate-floating gate interference in programming NAND flash memory is provided. Prior to programming an upper page of a memory cell, the method includes checking whether adjacent pages of near memory cells have been programmed. The method may program adjacent pages of near memory cells that have not been programmed.