NAND Flash I/O Impedance Calibration With Temperature Compensation
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in efficiently calibrating output impedance and maintaining optimal operating conditions, particularly in NAND flash memory systems, which affect data transmission reliability and efficiency.
Innovation Solution
The semiconductor memory device incorporates a ZQ calibration circuit that adjusts the drive power for pull-up and pull-down circuits in the output circuit, using a comparator to match the output impedance with a reference resistor, and includes a temperature acquiring circuit to ensure precise voltage regulation and impedance calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If ZQ calibration is performed to adjust drive power for pull-up and pull-down circuits, then output impedance calibration precision is improved, but calibration time and operational complexity increase
Solution Approach 1:
The patent performs ZQ calibration during the initialization phase before normal data transmission operations begin. By completing the impedance calibration in advance, the system ensures accurate output impedance matching is established before data transmission starts, eliminating the need for repeated calibration during operation and thus reducing overall calibration time impact on productive operations.
Solution Approach 2:
The calibration circuit uses internally available components (comparators, reference voltages, and existing pull-up/pull-down circuits) to perform self-calibration without requiring external calibration equipment or additional complex calibration infrastructure. This self-service approach simplifies the calibration process and reduces external dependencies while maintaining precision.
2Stability of the object's composition
If temperature acquiring circuit is added to regulate voltage and calibrate impedance, then operating condition stability is improved, but device complexity increases
Solution Approach 1:
The temperature acquiring circuit serves multiple functions simultaneously: it monitors temperature conditions, regulates voltage levels based on temperature, and provides input for impedance calibration adjustments. By making this circuit multi-functional, the patent achieves improved operating stability without proportionally increasing device complexity, as a single circuit block performs multiple stabilization tasks.
Solution Approach 2:
The temperature acquiring circuit acts as an intermediary between the physical temperature environment and the electrical calibration control system. It converts temperature information into electrical signals that can be processed by the calibration logic, enabling indirect but precise control of operating conditions without direct mechanical or thermal intervention in the signal paths.
3Measurement precision
If comparator is used to match output impedance with reference resistor, then impedance matching accuracy is improved, but circuit complexity and power consumption increase
Solution Approach 1:
The comparator-based impedance matching is performed periodically during calibration phases rather than continuously during normal operation. This periodic execution allows the system to achieve accurate impedance matching when needed while minimizing power consumption by keeping the comparator inactive during data transmission operations, thus resolving the contradiction between matching accuracy and power usage.
Data Source
AI summary
A semiconductor memory device according to the present disclosure includes a memory cell array (110, 210), an input/output circuit (23) that inputs/outputs a signal from/to the memory cell array, and a temperature acquiring circuit (29) that generates temperature information according to the temperature of the memory cell array, and corrects the characteristics of the input/output circuit based on the temperature information.