NAND Flash Memory Kink Checking via Capacitive Coupling Compensation

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Solution Overview

Problem

In NAND flash memory devices, capacitive coupling between adjacent memory cells during all-bit-line programming can lead to programming kinks, resulting in over-programming and operational errors due to increased programming voltage step sizes, which affect the accuracy of data storage and retrieval.

Innovation Solution

The method involves performing kink checks by selectively applying different voltages to bit lines based on the programming status of adjacent memory cells, determining the effect of capacitive coupling, and applying kink correction voltages to ensure accurate programming by adjusting the programming pulse applied to the memory cell.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If all-bit-line programming is used to program memory cells simultaneously, then programming speed is improved, but programming kinks occur due to capacitive coupling between adjacent memory cells causing over-programming

Engineering Contradiction:
Improveprogramming speedVSAvoidprogramming accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs kink checks before programming to determine the programming status of adjacent memory cells. Based on these checks, kink correction voltages are pre-calculated and applied during the programming pulse to compensate for capacitive coupling effects, preventing over-programming while maintaining fast all-bit-line programming

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by sensing the programming status of adjacent memory cells through kink checks and using this information to adjust the programming voltage. The kink correction voltage is dynamically determined based on the detected programming state, creating a closed-loop control system that maintains programming accuracy

Inventive Principle:
Principle #23Feedback

2Reliability

If kink checks and kink correction voltages are applied to prevent over-programming, then programming accuracy is improved, but device complexity increases

Engineering Contradiction:
Improveprogramming accuracyVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the existing bit line infrastructure to serve multiple functions: it acts as both the data transmission line and the sensing path for kink checks. The same bit line control circuitry that handles normal programming operations is also used to apply kink correction voltages, eliminating the need for separate dedicated correction circuitry

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the impact of programming kinks, maintaining the intended programming voltage and preventing over-programming, thereby enhancing the accuracy of data storage and retrieval in NAND flash memory devices.

Implementation Method 1

capacitive coupling between adjacent bit lines can lead to programming kinks

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS9251908B2Memory kink checking
Publication Date: 2016.02.02 MICRON TECHNOLOGY INC
  • US9251908B2 patent drawing
  • US9251908B2 patent drawing
  • US9251908B2 patent drawing

AI summary

This disclosure concerns memory kink checking. One embodiment includes selectively applying one of a plurality of voltages to a first data line according to a programming status of a first memory cell, wherein the first memory cell is coupled to the first data line and to a selected access line. An effect on a second data line is determined, due at least in part to the voltage applied to the first data line and a capacitive coupling between at least the first data line and the second data line, wherein the second data line is coupled to a second memory cell, the second memory cell is adjacent to the first memory cell, and the second memory cell is coupled to the selected access line. A kink correction is applied to the second data line, responsive to the determined effect, during a subsequent programming pulse applied to the second memory cell.