NAND Flash Memory Read Circuit Positive Source Voltage
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Solution Overview
Problem
In NAND cell type flash memory, the progression of shrinking memory cells and multi-value storage technology has resulted in threshold voltage distributions with increasingly low negative values, leading to challenges in read operations where a negative voltage is required for the control gate, necessitating a special voltage generating circuit, which increases circuit area and power consumption.
Innovation Solution
The implementation of a negative sense scheme where a positive voltage is applied to the source line and well, eliminating the need for a voltage generating circuit to set a negative voltage on the control gate during read operations, allowing the use of positive voltages for both the source line and well, thereby reducing circuit area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a negative voltage is applied to the control gate during read operation, then the read operation can be performed correctly on memory cells with low threshold voltage, but a special voltage generating circuit is required which increases circuit area and power consumption
Solution Approach 1:
Instead of applying negative voltage to the control gate to enable correct reading, the patent inverts the approach by applying positive voltage to the source line. This voltage inversion allows the use of a positive read voltage on the control gate while maintaining correct read operation, thereby eliminating the need for a negative voltage generating circuit.
Solution Approach 2:
The patent changes the voltage parameter of the source line from its conventional state to a positive voltage state during read operations. This parameter change enables the control gate to use a positive read voltage instead of negative voltage, simplifying the voltage generating circuit while maintaining read correctness.
2Adaptability or versatility
If a negative voltage generating circuit is added, then negative voltage for control gate can be provided, but circuit area increases
Solution Approach 1:
The patent eliminates the need for negative voltage capability by inverting the voltage application strategy - applying positive voltage to the source line instead of negative voltage to the control gate. This removes the requirement for a negative voltage generating circuit and its associated circuit area.
3Adaptability or versatility
If a negative voltage generating circuit is added, then negative voltage for control gate can be provided, but power consumption increases
Solution Approach 1:
By inverting the voltage application approach and using positive voltage on the source line, the patent eliminates the power-consuming negative voltage generating circuit, thereby reducing overall power consumption while maintaining the ability to perform correct read operations.
Data Source
AI summary
A nonvolatile semiconductor memory device in an embodiment includes a semiconductor layer, a memory cell array, word lines, bit lines, a source line, and a control circuit. The memory cell array has memory strings, each of the memory strings having memory cells. The word lines are connected to the control gates of the memory cells. The control circuit controls a voltage applied to the semiconductor layer, the control gates, the bit lines, and the source line. When executing a read operation, the control circuit begins application of a first voltage to the source line at a first time, the first voltage having a positive value. The control circuit begins application of a second voltage to unselected word lines at the first time or thereafter, the second voltage setting the memory cells to a conductive state regardless of retained data of the memory cells.