NAND Flash Memory Shared Word-Line Layers
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Solution Overview
Problem
As the bit density of NAND type flash memory increases, the number of contact gates and selection gates required for laminated memory cells grows, leading to a larger peripheral circuit area, and existing technologies fail to effectively address the increasing complexity of driving these gates independently.
Innovation Solution
A non-volatile semiconductor storage device is designed with a configuration where multiple memory strings share word-line conductive layers and electric charge accumulation layers, with specific relations (m≧n, m≧n/2, and m≧n) ensuring efficient sharing and reduced area occupation, allowing for effective reduction in the number of gates that need to be driven independently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of laminated memory cell layers is increased to improve bit density, then the storage capacity is improved, but the number of contact gates and selection gates increases leading to larger peripheral circuit area
Solution Approach 1:
Multiple memory strings share common word-line conductive layers and electric charge accumulation layers. Specifically, n layers of first conductive layers are shared by multiple memory strings, and multiple memory strings share the same electric charge accumulation layer, reducing the total number of independent gates that need to be driven
Solution Approach 2:
The word-line conductive layers serve multiple functions: they act as control gates for memory transistors in different layers, and are shared across multiple memory strings. The electric charge accumulation layer serves as both the charge storage medium and a shared component for multiple memory strings, reducing peripheral circuit complexity
2Quantity of substance
If more contact gates and selection gates are added to support increased laminated layers, then the storage capacity is improved, but the device complexity increases
Solution Approach 1:
The patent merges the gate structures across multiple memory strings by implementing shared word-line conductive layers. Instead of having independent contact gates for each memory string, the same conductive layers serve multiple strings, thereby reducing the number of independently driven gates while supporting increased storage capacity through lamination
3Quantity of substance
If the number of memory strings is increased to improve storage capacity, then the bit density is improved, but the area occupied by word connection layers increases
Solution Approach 1:
The patent transitions from a planar arrangement to a three-dimensional lamination structure. Memory cells are stacked vertically with word-line conductive layers arranged in multiple layers (n layers) in the lamination direction. This vertical stacking allows multiple memory strings to share the same horizontal footprint, reducing the area occupied by word connection layers while increasing storage capacity
Solution Approach 2:
Multiple memory strings are nested within the same vertical column, sharing common word-line conductive layers and electric charge accumulation layers. The memory strings are arranged with m columns in the second direction orthogonal to the lamination direction, allowing efficient space utilization and reduced connection layer area
Data Source
AI summary
Each of the memory blocks includes: a first conductive layer expanding in parallel to the substrate over the first area, n layers of the first conductive layers being formed in a lamination direction and shared by the plurality of memory strings; a first semiconductor layer; and an electric charge accumulation layer. The memory strings are arranged with m columns in a second direction for each of the memory blocks. The wiring layers are arranged in the second direction, formed to extend to the vicinity of one end of the first conductive layer in the first direction from one side of the memory block, and connected via contact plugs to the first conductive layers. A relation represented by (Formula 1) is satisfied: (Formula 1) m>=n