NAND Flash Memory Verify Control Circuit for Program Time Reduction
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Solution Overview
Problem
In NAND flash memory devices, the increased number of verify operations required for multilevel data write operations leads to longer program times, necessitating a method to reduce the number of verify operations while maintaining reliability.
Innovation Solution
Implementing a data write method that performs verify operations only on the lowest threshold voltage level during data write, skipping verify operations for other threshold voltage levels, and adjusting the verify operation based on the number of verify pass bits to optimize the number of program loops and threshold voltage levels involved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multilevel implementation of NAND flash memory is adopted, then data storage capacity is improved, but the number of verify operations increases leading to longer program time
Solution Approach 1:
The patent segments the verify operation by threshold voltage level, performing verify operations only for the lowest threshold voltage level (first threshold voltage level) and skipping verify operations for higher threshold voltage levels. This segmentation approach reduces the total number of verify operations while maintaining reliable data write for the most critical lowest level, thereby resolving the contradiction between multilevel storage capacity and program time.
2Manufacturing precision
If write step voltage is decreased to enable finer control of data write levels, then manufacturing precision is improved, but the number of data write operations increases leading to longer program time
Solution Approach 1:
The patent extracts and performs verify operations only for the lowest threshold voltage level, omitting verify operations for higher levels. This extraction approach allows the system to maintain precise control of the most critical lowest write level while eliminating redundant verify operations for higher levels, thus reducing program time without sacrificing the precision benefits of decreased write step voltage.
3Reliability
If verify operations are performed for all threshold voltage levels, then reliability is improved, but the number of verify operations increases leading to longer program time
Solution Approach 1:
The patent applies local quality by performing verify operations only for the lowest threshold voltage level, which is the most critical level for data retention and write reliability. Higher threshold voltage levels are skipped because they are less critical. This localized verify approach maintains reliability for the most important data while significantly reducing the total number of verify operations and program time.
Data Source
AI summary
A semiconductor memory device includes a control circuit. The control circuit executes control to perform a verify operation with respect to only a lowest threshold voltage level of a memory cell at a time of a data write operation, and to skip the verify operation with respect to the other threshold voltage levels. The control circuit determines whether a verify pass bit number of the lowest threshold voltage level, which is counted by a bit scan circuit, is a prescribed bit number or more, and the control circuit further executes control, if the verify pass bit number is the prescribed bit number or more, to perform the verify operation with respect to only the lowest threshold voltage level and a threshold voltage level that is higher than the lowest threshold voltage level, and to skip the verify operation with respect to the other threshold voltage levels.