NAND Flash Memory Permanent Erasure via Voltage Boosting
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Solution Overview
Problem
The widespread use of NAND flash memory has led to a serious issue of data leakage, necessitating a method to securely erase information to prevent unauthorized access.
Innovation Solution
A NAND flash memory system comprising a control unit with a signal receiving circuit, a voltage boosted circuit, and a flash array, where the voltage boosted circuit generates a device erase pulse with a magnitude higher than the initial voltage to permanently erase data in power-on read blocks, rendering the memory unusable.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional erase method is used, then data can be erased from the NAND flash memory, but the memory can still be reused and data leakage may occur
Solution Approach 1:
The patent extracts the critical system blocks (boot blocks, parameter blocks, version blocks) from the normal data blocks and applies a specialized destroy pulse exclusively to these blocks. This selective extraction ensures that even if other blocks remain intact, the memory cannot be reused without these critical blocks, thereby preventing data leakage while maintaining partial productivity for non-critical data.
Solution Approach 2:
The patent changes the voltage parameter by applying a destroy pulse with magnitude significantly higher than the initial voltage (e.g., 20V-30V compared to normal operating voltage). This parameter change permanently damages the floating gate in critical blocks, ensuring irreversible data destruction and preventing any future access to sensitive information while distinguishing the erase operation from normal operations.
2Reliability
If the voltage boosted circuit exerts a device erase pulse to permanently erase data in power-on read blocks, then data security is enhanced, but the NAND flash memory cannot be used anymore
Solution Approach 1:
The patent segments the flash memory into critical blocks (power-on read blocks containing boot code, parameters, versions) and non-critical blocks (user data blocks). The destroy pulse is applied selectively only to critical blocks, ensuring that the most sensitive data is permanently erased while leaving other blocks potentially intact for recovery or repurposing, thus balancing security with operational flexibility.
Solution Approach 2:
The patent applies a preliminary destroy operation to critical blocks before complete memory erasure or disposal. By preemptively damaging the floating gate in power-on read blocks with a high-magnitude pulse, the system prevents any future unauthorized access to critical system data, ensuring that even if the memory device is recovered or reused, the most sensitive information remains permanently destroyed.
3Reliability
If a high magnitude erase pulse is applied to power-on read blocks, then permanent data erasure is achieved, but the erase process takes time
Solution Approach 1:
The patent applies excessive voltage magnitude (20V-30V) for a relatively short duration specifically to critical blocks, achieving permanent erasure faster than conventional methods would take for complete memory erasure. By concentrating the high-magnitude pulse only on power-on read blocks rather than the entire memory, the system achieves permanent erasure of the most critical data in a time-efficient manner.
Solution Approach 2:
The patent performs preliminary identification and selection of power-on read blocks before applying the destroy pulse. By pre-mapping and identifying which blocks contain critical system data (boot blocks, parameter blocks, version blocks), the system can immediately apply the high-magnitude erase pulse to these specific blocks without needing to scan or process the entire memory, thereby reducing the overall erase time while ensuring permanent destruction of critical information.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a fast and secure method to erase data, preventing data leakage by ensuring that once the data is removed, the NAND flash memory cannot be used again, thus enhancing data security.
Implementation Method 1
the voltage boosted circuit exerts a device erase pulse whose magnitude is larger than an initial voltage to blocks of the flash array
Data Source
AI summary
The present application provides a NAND flash memory, comprising: a control unit, which includes a signal receiving unit, a voltage boosted circuit and a flash array; and a power source supplying power to the control unit; wherein when the voltage boosted circuit receives an erase signal from the signal receiving unit, the voltage boosted circuit exerts a device erase pulse whose magnitude is larger than an initial voltage to blocks of the flash array to permanently erase data in the blocks; the blocks include power-on read blocks. By removing data from at least power-on read blocks, the present invention discloses a scheme for permanently destroying the NAND flash memory.