NAND Flash Read Reference Voltage Calibration for Lower Bit Errors
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Solution Overview
Problem
Non-volatile flash memories face challenges in maintaining data reliability due to charge losses and inter-cell interference, leading to increased bit error rates, which traditional error correction methods struggle to address efficiently, especially when read reference voltages are not adapted to the memory's life-cycle conditions.
Innovation Solution
A method for read reference voltage calibration in non-volatile memories that adjusts the read reference voltage based on the number of bit errors observed during decoding, using error correction codes to determine optimal voltage levels through iterative processes and look-up tables, minimizing bit error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If soft-input decoding is used to improve error correction performance, then data reliability is improved, but latency and energy consumption increase
Solution Approach 1:
The patent implements dynamic threshold adaptation where read reference voltages are adjusted based on the memory's current life-cycle state. This allows the system to optimize between hard-input and soft-input decoding operations dynamically, using soft-input only when necessary while maintaining data reliability. The adaptive thresholding mechanism enables the system to respond to changing memory conditions without permanently incurring the latency and energy penalties of soft-input decoding.
Solution Approach 2:
The patent changes the read reference voltage parameter based on observed bit error rates and memory state. By monitoring error rates and adapting the threshold voltage accordingly, the system can maintain high reliability while avoiding unnecessary soft-input decoding operations. This parameter adaptation allows the system to operate in the most efficient mode given current conditions.
2Reliability
If read-retry mechanisms are used to dynamically adjust reference voltages and reduce error probabilities, then data reliability is improved, but time consumption increases significantly
Solution Approach 1:
The patent performs preliminary calibration of read reference voltages by reading predetermined reference data and observing bit errors before actual data operations. This preliminary action establishes optimal thresholds in advance, avoiding the need for time-consuming read-retry mechanisms during normal operation. The system prepares the optimal read state beforehand, so when actual reading occurs, it can proceed efficiently without multiple retries.
Solution Approach 2:
The system uses predetermined reference data stored in the memory to self-calibrate its read reference voltages. By reading this known reference data and observing error patterns, the system automatically determines optimal thresholds without external intervention or time-consuming iterative retries. The memory itself provides the calibration data needed to optimize its own reading operation.
3Device complexity
If reference voltages are not adapted to memory life-cycle conditions, then device complexity is reduced, but bit error rates increase due to charge losses and inter-cell interference
Solution Approach 1:
The patent implements a feedback mechanism where the system reads predetermined reference data, observes the number of bit errors, and uses this information to define and adjust new voltage levels for subsequent readings. This closed-loop feedback allows the system to automatically adapt to memory degradation from charge losses and inter-cell interference without complex external control, maintaining low error rates while keeping the adaptation mechanism relatively simple.
Solution Approach 2:
The memory system performs self-calibration by using its own predetermined reference data to determine optimal read reference voltages. The system monitors its own error rates and automatically adjusts its operating parameters without requiring complex external calibration equipment or procedures. This self-service approach maintains reliability while minimizing additional device complexity.
Data Source
AI summary
A method for read reference voltage calibration of a non-volatile memory, NVM, such as flash memory, particularly of the NAND type, comprises: Reading from the NVM predetermined reference data stored therein and being encoded with an error correction code, ECC, wherein the reading is performed when a read reference voltage of the NVM, which is used as a reference voltage, such as a threshold voltage, for the reading, is set at a defined voltage level; decoding the read data and observing a number of bit errors, e.g., in a codeword, of the read data in relation to the reference data; and defining a new voltage level of the read reference voltage for a subsequent reading of data from the NVM based on the observed number of bit errors and setting the read reference voltage to the defined new voltage level.