NAND Flash Memory Write Pass Voltage Control
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Solution Overview
Problem
The reliability of NAND type flash memory during write operations is compromised due to voltage fluctuations affecting the threshold voltage of memory cells, leading to potential mistaken writes.
Innovation Solution
A nonvolatile semiconductor memory device design that applies a program voltage to a selected memory cell and distinct write pass voltages to non-selected memory cells, with the write pass voltages being raised in a stepped manner to prevent channel potential drops and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a program voltage is applied to a selected memory cell during a write operation, then data can be stored in the selected memory cell, but voltage fluctuations affect the threshold voltage of non-selected memory cells leading to potential mistaken writes
Solution Approach 1:
The patent applies different write pass voltages to different groups of non-selected memory cells based on their position relative to the selected memory cell. Specifically, a first write pass voltage is applied to a first group of non-selected memory cells and a second write pass voltage is applied to a second group of non-selected memory cells. This localized differentiation prevents voltage fluctuations from causing mistaken writes while maintaining reliable data storage in the selected cell.
Solution Approach 2:
The patent segments the non-selected memory cells into multiple groups (first group and second group) and applies different write pass voltages to each group. This segmentation allows for more precise control of voltage application, preventing threshold voltage fluctuations that could lead to mistaken writes in non-selected cells while maintaining the write operation reliability for the selected cell.
2Reliability
If write pass voltages are applied to non-selected memory cells to prevent mistaken writes, then reliability improves, but power consumption increases
Solution Approach 1:
The patent applies different write pass voltages to different groups of non-selected memory cells, optimizing the voltage level for each group based on its position. This localized approach ensures that only the necessary voltage is applied to prevent mistaken writes in each specific group, rather than applying a uniform high voltage to all non-selected cells, thereby reducing overall power consumption while maintaining reliability.
Solution Approach 2:
The patent changes the voltage parameter (write pass voltage) based on the position of non-selected memory cells relative to the selected cell. By adjusting the voltage level according to position, the patent prevents mistaken writes in critical areas while using lower voltages in less critical areas, thus optimizing the balance between reliability and power consumption during write operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses channel potential drops, preventing mistaken writes and reducing power consumption by optimizing voltage application through capacitive coupling.
Implementation Method 1
raising the first write pass voltage toward a first target value by executing a voltage raising operation having a first voltage rise width, X times, and raises the second write pass voltage toward a second target value by executing a voltage raising operation having a second voltage rise width, Y times
Data Source
AI summary
A first non-selected word line including a word line adjacent to a selected word line is applied with a first write pass voltage. Furthermore, a second non-selected word line which is a non-selected word line excluding the first non-selected word line is applied with a second write pass voltage smaller than a program voltage. A control circuit, in the write operation, raises the first write pass voltage toward a first target value by executing a voltage raising operation having a first voltage rise width, X times, and raises the second write pass voltage toward a second target value by executing a voltage raising operation having a second voltage rise width, Y times. The first voltage rise width is larger than the second voltage rise width, and X times is fewer than Y times.