3D NAND Gate Stack Isolation for Charge Leakage Reliability
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Solution Overview
Problem
The integration degree of semiconductor devices is limited by the movement of charges between stacked memory cells due to the reduction in the gap between conductive layers, leading to reduced reliability.
Innovation Solution
A semiconductor device structure is developed with multiple data storage layers and blocking patterns to prevent charge movement between stacked memory cells, including a gate structure with alternately stacked insulating and conductive layers, a slit structure, and a channel structure with multiple insulating and blocking layers to enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the gap between conductive layers is reduced to increase integration degree, then the integration degree is improved, but charge movement between stacked memory cells occurs leading to reduced reliability
Solution Approach 1:
The data storage layer is segmented into multiple distinct layers (first data storage layer and second data storage layer) separated by blocking patterns. This segmentation prevents charge movement between adjacent memory cells while maintaining high integration density, as each layer can be independently controlled and isolated.
Solution Approach 2:
Blocking patterns are introduced as intermediary structures between the first and second data storage layers. These blocking patterns act as mediators that prevent charge leakage and movement between stacked memory cells, enabling reliable operation at reduced gap dimensions while maintaining high integration degree.
2Reliability
If multiple data storage layers and blocking patterns are added to prevent charge movement, then reliability is improved, but device complexity increases
Solution Approach 1:
The gate structure merges multiple functions into a single integrated structure: the alternately stacked insulating and conductive layers simultaneously serve as control gates and isolation structures. This merging reduces the need for separate blocking structures while maintaining reliability, thereby managing device complexity.
Solution Approach 2:
The conductive layers in the gate structure serve multiple functions: they act as control electrodes for charge injection and extraction, and simultaneously function as isolation structures that prevent charge movement between memory cells. This multi-functionality reduces the need for additional dedicated blocking structures, managing device complexity while maintaining reliability.
Data Source
AI summary
A semiconductor device may include a gate structure including alternately stacked insulating layers and conductive layers, a slit structure extending through the gate structure, a channel layer extending through the gate structure, a first data storage layer surrounding the channel layer, second data storage patterns respectively positioned between the conductive layers and the first data storage layer, first blocking patterns respectively positioned between the conductive layers and the second data storage patterns, and buffer patterns positioned between the insulating layers and the first data storage layer.