NAND Memory Cell Reprogramming Without Block Erasure
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Solution Overview
Problem
Flash memory devices with NAND architecture require entire blocks to be erased before reprogramming, leading to increased wear and inefficiency, as memory cells cannot be individually reprogrammed without erasing the entire block.
Innovation Solution
The method involves programming memory cells to specific program states with associated verify voltages, allowing for reprogramming without erasure, where cells with threshold voltages below a certain verify voltage represent the same data value, enabling reprogramming of a subset of cells within a block without erasing the entire block.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If entire blocks are erased before reprogramming in NAND architecture, then memory cells can be reprogrammed, but wear on the memory device increases
Solution Approach 1:
The patent segments the block erasure operation into selective cell reprogramming. Instead of erasing entire blocks before reprogramming, the invention identifies and reprograms only the specific memory cells that need updating, leaving other cells intact. This segmentation reduces the scope of erasure and reprogramming operations, thereby reducing wear on the memory device while maintaining reprogramming capability.
Solution Approach 2:
The patent applies partial action by performing reprogramming on only a subset of cells within a block rather than requiring full block erasure and reprogramming. The method determines which specific cells need reprogramming based on data comparison, and applies reprogramming operations only to those cells, avoiding unnecessary wear on cells that do not require updates.
2Ease of operation
If entire blocks are erased before reprogramming, then memory cells can be reprogrammed, but operational efficiency decreases
Solution Approach 1:
The patent segments the block erasure operation into selective cell reprogramming. Instead of erasing entire blocks before reprogramming, the invention identifies and reprograms only the specific memory cells that need updating, leaving other cells intact. This segmentation reduces the scope of erasure and reprogramming operations, thereby reducing wear on the memory device while maintaining reprogramming capability.
Solution Approach 2:
The patent applies partial action by performing reprogramming on only a subset of cells within a block rather than requiring full block erasure and reprogramming. The method determines which specific cells need reprogramming based on data comparison, and applies reprogramming operations only to those cells, avoiding unnecessary wear on cells that do not require updates.
3Reliability
If memory cells are reprogrammed individually without erasure, then wear is reduced, but data value representation becomes complex
Solution Approach 1:
The patent uses parameter changes, specifically threshold voltage levels, to represent different data values in reprogrammed cells. By controlling the threshold voltage to be below a verify voltage, the patent ensures that reprogrammed cells represent a specific data value (e.g., '0') without requiring full block erasure. This parameter-based approach simplifies the management of program states while enabling selective reprogramming.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces wear on memory devices by allowing selective reprogramming of memory cells within a block without full erasure, enhancing operational efficiency and extending the device's lifespan.
Implementation Method 1
programming a number of memory cells such that each of the number of memory cells are at either a first program state or a second program state
Data Source
AI summary
Apparatuses and methods for reprogramming memory cells are described. One or more methods for memory cell operation includes programming a number of memory cells such that each of the number of memory cells are at either a first program state or a second program state, the second program state having a first program verify voltage associated therewith; and reprogramming the number of memory cells such that at least one of the number of memory cells is reprogrammed to a third program state having a second program verify voltage associated therewith, wherein those of the number of memory cells having a threshold voltage less than the second program verify voltage represent a same data value.


