NAND Memory Charge-Trapping Segmentation for Data Retention

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Solution Overview

Problem

Conventional NAND memory arrays face data retention issues due to charge migration between memory cells, which is caused by continuous charge-trapping material extending across multiple cells, leading to unwanted charge transfer and data loss.

Innovation Solution

The implementation of thinned regions or breaks in the charge-trapping material between memory cells, such as silicon nitride, to impede charge migration, with structures like charge-blocking materials and gate-dielectric materials strategically placed to prevent charge transfer, forming vertically-stacked segments with gaps that inhibit charge migration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If continuous charge-trapping material is used across multiple memory cells, then manufacturing is simplified, but charge migration between cells occurs causing data retention issues

Engineering Contradiction:
Improvecharge-trapping material continuityVSAvoiddata retention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The charge-trapping material layer is segmented into discrete portions positioned over specific memory cells rather than forming a continuous layer. This segmentation prevents charge migration between adjacent cells while maintaining the charge-trapping functionality within each cell, resolving the contradiction between manufacturing simplicity and data retention reliability.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If charge-trapping material is extended across multiple cells, then device complexity is reduced, but charge migration causes data loss

Engineering Contradiction:
Improvecharge-trapping material structureVSAvoiddata loss
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

The charge-trapping material is divided into separate discrete portions over individual memory cells, preventing charge migration and associated data loss. This segmentation approach maintains relatively simple device structure while eliminating the harmful charge migration effect that causes data loss.

Inventive Principle:
Principle #1Segmentation

3Reliability

If thinned regions or breaks are introduced in charge-trapping material, then charge migration is impeded improving data retention, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedata retentionVSAvoidcharge-trapping material patterning
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The charge-trapping material is patterned into discrete portions using standard photolithography and etching techniques. The segmentation is achieved through conventional manufacturing processes with defined precision requirements, balancing the need to prevent charge migration with achievable manufacturing capabilities.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The charge-trapping material is present only where needed over specific memory cells and absent in regions between cells. This local quality approach places the material precisely where it is required to trap charge while preventing charge migration to adjacent cells, achieving improved data retention with manageable manufacturing precision requirements.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11201164B2Memory devices
Publication Date: 2021.12.14 MICRON TECHNOLOGY INC
  • US11201164B2 patent drawing
  • US11201164B2 patent drawing
  • US11201164B2 patent drawing

AI summary

Some embodiments include a NAND memory array which has a vertical stack of alternating insulative levels and wordline levels. The wordline levels have terminal ends corresponding to control gate regions. Charge-trapping material is along the control gate regions of the wordline levels, and is spaced from the control gate regions by charge-blocking material. The charge-trapping material along vertically adjacent wordline levels is spaced by intervening regions through which charge migration is impeded. Channel material extends vertically along the stack and is spaced from the charge-trapping material by charge-tunneling material. Some embodiments include methods of forming NAND memory arrays.